[AArch64][PATCH 5/14] Support FP16 Scalar Two Register Misc. instructions.

ARMv8.2 adds 16-bit floating point operations as an optional extension
to the floating point and Adv.SIMD support. This patch adds FP16
instructions to the group Scalar Two Register Misc, making them
available when +simd+fp16 is enabled.

The instructions added are: FCMGT, FCMGE, FCMEQ, FCMLE, FCMLT, FCVTNS,
FCVTNU, FCVTPS, FCVTPU, FCVTMS, FCVTMU, FCVTZS, FCVTZU, FCVTAS, FCVTAU,
SCVTF, UCVTF, FRECPE, FRSQRTE and FRECPX.

The general form for these instructions is
  <OP> <Hd>, <Hs>
or
  <OP> <Hd>, <Hs>, #0.0

Tested the series for aarch64-none-linux-gnu with cross-compiled
check-binutils and check-gas.

gas/testsuite/
2015-12-14  Matthew Wahab  <matthew.wahab@arm.com>

	* gas/aarch64/advsimd-fp16.d: Update expected output.
	* gas/aarch64/advsimd-fp16.s: Add tests for scalar two register misc.
	instructions.

opcodes/
2015-12-14  Matthew Wahab  <matthew.wahab@arm.com>

	* aarch64-asm-2.c: Regenerate.
	* aarch64-dis-2.c: Regenerate.
	* aarch64-opc-2.c: Regenerate.
	* aarch64-tbl.h (QL_SISD_FCMP_H_0): new.
	(QL_S_2SAMEH): New.
	(aarch64_opcode_table): Add fp16 versions of fcvtns, fcvtms,
	fcvtas, scvtf, fcmgt, fcmeq, fcmlt, fcvtps, fcvtzs, frecpe,
	frecpx, fcvtnu, fcvtmu, fcvtau, ucvtf, fcmge, fcmle, fcvtpu,
	fcvtzu and frsqrte to the scalar two register misc. group.

Change-Id: I19b25baae33027ce1bade68cc8dc47a4321d045c
This commit is contained in:
Matthew Wahab
2015-12-14 16:57:04 +00:00
parent f3aa142b8b
commit 80776b29d6
8 changed files with 1652 additions and 1240 deletions

View File

@ -1,3 +1,9 @@
2015-12-14 Matthew Wahab <matthew.wahab@arm.com>
* gas/aarch64/advsimd-fp16.d: Update expected output.
* gas/aarch64/advsimd-fp16.s: Add tests for scalar two register misc.
instructions.
2015-12-14 Matthew Wahab <matthew.wahab@arm.com>
* gas/aarch64/advsimd-fp16.d: Update expected output.

View File

@ -348,3 +348,83 @@ Disassembly of section \.text:
[0-9a-f]+: 6ea1f820 fsqrt v0.4s, v1.4s
[0-9a-f]+: 2ef9f820 fsqrt v0.4h, v1.4h
[0-9a-f]+: 6ef9f820 fsqrt v0.8h, v1.8h
[0-9a-f]+: 5ee0c820 fcmgt d0, d1, #0.0
[0-9a-f]+: 5ea0c820 fcmgt s0, s1, #0.0
[0-9a-f]+: 5ef8c820 fcmgt h0, h1, #0.0
[0-9a-f]+: 5ef8c800 fcmgt h0, h0, #0.0
[0-9a-f]+: 7ee0c820 fcmge d0, d1, #0.0
[0-9a-f]+: 7ea0c820 fcmge s0, s1, #0.0
[0-9a-f]+: 7ef8c820 fcmge h0, h1, #0.0
[0-9a-f]+: 7ef8c800 fcmge h0, h0, #0.0
[0-9a-f]+: 5ee0d820 fcmeq d0, d1, #0.0
[0-9a-f]+: 5ea0d820 fcmeq s0, s1, #0.0
[0-9a-f]+: 5ef8d820 fcmeq h0, h1, #0.0
[0-9a-f]+: 5ef8d800 fcmeq h0, h0, #0.0
[0-9a-f]+: 7ee0d820 fcmle d0, d1, #0.0
[0-9a-f]+: 7ea0d820 fcmle s0, s1, #0.0
[0-9a-f]+: 7ef8d820 fcmle h0, h1, #0.0
[0-9a-f]+: 7ef8d800 fcmle h0, h0, #0.0
[0-9a-f]+: 5ee0e820 fcmlt d0, d1, #0.0
[0-9a-f]+: 5ea0e820 fcmlt s0, s1, #0.0
[0-9a-f]+: 5ef8e820 fcmlt h0, h1, #0.0
[0-9a-f]+: 5ef8e800 fcmlt h0, h0, #0.0
[0-9a-f]+: 5e61a820 fcvtns d0, d1
[0-9a-f]+: 5e21a820 fcvtns s0, s1
[0-9a-f]+: 5e79a820 fcvtns h0, h1
[0-9a-f]+: 5e79a800 fcvtns h0, h0
[0-9a-f]+: 7e61a820 fcvtnu d0, d1
[0-9a-f]+: 7e21a820 fcvtnu s0, s1
[0-9a-f]+: 7e79a820 fcvtnu h0, h1
[0-9a-f]+: 7e79a800 fcvtnu h0, h0
[0-9a-f]+: 5ee1a820 fcvtps d0, d1
[0-9a-f]+: 5ea1a820 fcvtps s0, s1
[0-9a-f]+: 5ef9a820 fcvtps h0, h1
[0-9a-f]+: 5ef9a800 fcvtps h0, h0
[0-9a-f]+: 7ee1a820 fcvtpu d0, d1
[0-9a-f]+: 7ea1a820 fcvtpu s0, s1
[0-9a-f]+: 7ef9a820 fcvtpu h0, h1
[0-9a-f]+: 7ef9a800 fcvtpu h0, h0
[0-9a-f]+: 5e61b820 fcvtms d0, d1
[0-9a-f]+: 5e21b820 fcvtms s0, s1
[0-9a-f]+: 5e79b820 fcvtms h0, h1
[0-9a-f]+: 5e79b800 fcvtms h0, h0
[0-9a-f]+: 7e61b820 fcvtmu d0, d1
[0-9a-f]+: 7e21b820 fcvtmu s0, s1
[0-9a-f]+: 7e79b820 fcvtmu h0, h1
[0-9a-f]+: 7e79b800 fcvtmu h0, h0
[0-9a-f]+: 5ee1b820 fcvtzs d0, d1
[0-9a-f]+: 5ea1b820 fcvtzs s0, s1
[0-9a-f]+: 5ef9b820 fcvtzs h0, h1
[0-9a-f]+: 5ef9b800 fcvtzs h0, h0
[0-9a-f]+: 7ee1b820 fcvtzu d0, d1
[0-9a-f]+: 7ea1b820 fcvtzu s0, s1
[0-9a-f]+: 7ef9b820 fcvtzu h0, h1
[0-9a-f]+: 7ef9b800 fcvtzu h0, h0
[0-9a-f]+: 5e61c820 fcvtas d0, d1
[0-9a-f]+: 5e21c820 fcvtas s0, s1
[0-9a-f]+: 5e79c820 fcvtas h0, h1
[0-9a-f]+: 5e79c800 fcvtas h0, h0
[0-9a-f]+: 7e61c820 fcvtau d0, d1
[0-9a-f]+: 7e21c820 fcvtau s0, s1
[0-9a-f]+: 7e79c820 fcvtau h0, h1
[0-9a-f]+: 7e79c800 fcvtau h0, h0
[0-9a-f]+: 5e61d820 scvtf d0, d1
[0-9a-f]+: 5e21d820 scvtf s0, s1
[0-9a-f]+: 5e79d820 scvtf h0, h1
[0-9a-f]+: 5e79d800 scvtf h0, h0
[0-9a-f]+: 7e61d820 ucvtf d0, d1
[0-9a-f]+: 7e21d820 ucvtf s0, s1
[0-9a-f]+: 7e79d820 ucvtf h0, h1
[0-9a-f]+: 7e79d800 ucvtf h0, h0
[0-9a-f]+: 5ee1d820 frecpe d0, d1
[0-9a-f]+: 5ea1d820 frecpe s0, s1
[0-9a-f]+: 5ef9d820 frecpe h0, h1
[0-9a-f]+: 5ef9d800 frecpe h0, h0
[0-9a-f]+: 7ee1d820 frsqrte d0, d1
[0-9a-f]+: 7ea1d820 frsqrte s0, s1
[0-9a-f]+: 7ef9d820 frsqrte h0, h1
[0-9a-f]+: 7ef9d800 frsqrte h0, h0
[0-9a-f]+: 5ee1f820 frecpx d0, d1
[0-9a-f]+: 5ea1f820 frecpx s0, s1
[0-9a-f]+: 5ef9f820 frecpx h0, h1
[0-9a-f]+: 5ef9f800 frecpx h0, h0

View File

@ -112,3 +112,45 @@
tworeg_misc frecpe
tworeg_misc frsqrte
tworeg_misc fsqrt
/* Scalar two-register misc. */
.macro stworeg_zero, op
\op d0, d1, #0.0
\op s0, s1, #0.0
\op h0, h1, #0.0
\op h0, h0, #0.0
.endm
stworeg_zero fcmgt
stworeg_zero fcmge
stworeg_zero fcmeq
stworeg_zero fcmle
stworeg_zero fcmlt
.macro stworeg_misc, op
\op d0, d1
\op s0, s1
\op h0, h1
\op h0, h0
.endm
stworeg_misc fcvtns
stworeg_misc fcvtnu
stworeg_misc fcvtps
stworeg_misc fcvtpu
stworeg_misc fcvtms
stworeg_misc fcvtmu
stworeg_misc fcvtzs
stworeg_misc fcvtzu
stworeg_misc fcvtas
stworeg_misc fcvtau
stworeg_misc scvtf
stworeg_misc ucvtf
stworeg_misc frecpe
stworeg_misc frsqrte
stworeg_misc frecpx

View File

@ -1,3 +1,15 @@
2015-12-14 Matthew Wahab <matthew.wahab@arm.com>
* aarch64-asm-2.c: Regenerate.
* aarch64-dis-2.c: Regenerate.
* aarch64-opc-2.c: Regenerate.
* aarch64-tbl.h (QL_SISD_FCMP_H_0): new.
(QL_S_2SAMEH): New.
(aarch64_opcode_table): Add fp16 versions of fcvtns, fcvtms,
fcvtas, scvtf, fcmgt, fcmeq, fcmlt, fcvtps, fcvtzs, frecpe,
frecpx, fcvtnu, fcvtmu, fcvtau, ucvtf, fcmge, fcmle, fcvtpu,
fcvtzu and frsqrte to the scalar two register misc. group.
2015-12-14 Matthew Wahab <matthew.wahab@arm.com>
* aarch64-asm-2.c: Regenerate.

View File

@ -107,338 +107,338 @@ aarch64_find_real_opcode (const aarch64_opcode *opcode)
case 394: /* ushll2 */
value = 394; /* --> ushll2. */
break;
case 490: /* mov */
case 489: /* dup */
value = 489; /* --> dup. */
break;
case 568: /* sxtw */
case 567: /* sxth */
case 566: /* sxtb */
case 569: /* asr */
case 565: /* sbfx */
case 564: /* sbfiz */
case 563: /* sbfm */
value = 563; /* --> sbfm. */
break;
case 572: /* bfc */
case 573: /* bfxil */
case 571: /* bfi */
case 570: /* bfm */
value = 570; /* --> bfm. */
break;
case 578: /* uxth */
case 577: /* uxtb */
case 580: /* lsr */
case 579: /* lsl */
case 576: /* ubfx */
case 575: /* ubfiz */
case 574: /* ubfm */
value = 574; /* --> ubfm. */
break;
case 598: /* cset */
case 597: /* cinc */
case 596: /* csinc */
value = 596; /* --> csinc. */
break;
case 601: /* csetm */
case 600: /* cinv */
case 599: /* csinv */
value = 599; /* --> csinv. */
break;
case 603: /* cneg */
case 602: /* csneg */
value = 602; /* --> csneg. */
break;
case 621: /* rev */
case 622: /* rev64 */
value = 621; /* --> rev. */
break;
case 629: /* lsl */
case 628: /* lslv */
value = 628; /* --> lslv. */
break;
case 631: /* lsr */
case 630: /* lsrv */
value = 630; /* --> lsrv. */
break;
case 633: /* asr */
case 632: /* asrv */
value = 632; /* --> asrv. */
break;
case 635: /* ror */
case 634: /* rorv */
value = 634; /* --> rorv. */
break;
case 645: /* mul */
case 644: /* madd */
value = 644; /* --> madd. */
break;
case 647: /* mneg */
case 646: /* msub */
value = 646; /* --> msub. */
break;
case 649: /* smull */
case 648: /* smaddl */
value = 648; /* --> smaddl. */
break;
case 651: /* smnegl */
case 650: /* smsubl */
value = 650; /* --> smsubl. */
break;
case 654: /* umull */
case 653: /* umaddl */
value = 653; /* --> umaddl. */
break;
case 656: /* umnegl */
case 655: /* umsubl */
value = 655; /* --> umsubl. */
break;
case 667: /* ror */
case 666: /* extr */
value = 666; /* --> extr. */
break;
case 874: /* bic */
case 873: /* and */
value = 873; /* --> and. */
break;
case 876: /* mov */
case 875: /* orr */
value = 875; /* --> orr. */
break;
case 879: /* tst */
case 878: /* ands */
value = 878; /* --> ands. */
break;
case 884: /* uxtw */
case 883: /* mov */
case 882: /* orr */
value = 882; /* --> orr. */
break;
case 886: /* mvn */
case 885: /* orn */
value = 885; /* --> orn. */
break;
case 890: /* tst */
case 889: /* ands */
value = 889; /* --> ands. */
break;
case 1016: /* staddb */
case 920: /* ldaddb */
value = 920; /* --> ldaddb. */
break;
case 1017: /* staddh */
case 921: /* ldaddh */
value = 921; /* --> ldaddh. */
break;
case 1018: /* stadd */
case 922: /* ldadd */
value = 922; /* --> ldadd. */
case 510: /* mov */
case 509: /* dup */
value = 509; /* --> dup. */
break;
case 588: /* sxtw */
case 587: /* sxth */
case 586: /* sxtb */
case 589: /* asr */
case 585: /* sbfx */
case 584: /* sbfiz */
case 583: /* sbfm */
value = 583; /* --> sbfm. */
break;
case 592: /* bfc */
case 593: /* bfxil */
case 591: /* bfi */
case 590: /* bfm */
value = 590; /* --> bfm. */
break;
case 598: /* uxth */
case 597: /* uxtb */
case 600: /* lsr */
case 599: /* lsl */
case 596: /* ubfx */
case 595: /* ubfiz */
case 594: /* ubfm */
value = 594; /* --> ubfm. */
break;
case 618: /* cset */
case 617: /* cinc */
case 616: /* csinc */
value = 616; /* --> csinc. */
break;
case 621: /* csetm */
case 620: /* cinv */
case 619: /* csinv */
value = 619; /* --> csinv. */
break;
case 623: /* cneg */
case 622: /* csneg */
value = 622; /* --> csneg. */
break;
case 641: /* rev */
case 642: /* rev64 */
value = 641; /* --> rev. */
break;
case 649: /* lsl */
case 648: /* lslv */
value = 648; /* --> lslv. */
break;
case 651: /* lsr */
case 650: /* lsrv */
value = 650; /* --> lsrv. */
break;
case 653: /* asr */
case 652: /* asrv */
value = 652; /* --> asrv. */
break;
case 655: /* ror */
case 654: /* rorv */
value = 654; /* --> rorv. */
break;
case 665: /* mul */
case 664: /* madd */
value = 664; /* --> madd. */
break;
case 667: /* mneg */
case 666: /* msub */
value = 666; /* --> msub. */
break;
case 669: /* smull */
case 668: /* smaddl */
value = 668; /* --> smaddl. */
break;
case 671: /* smnegl */
case 670: /* smsubl */
value = 670; /* --> smsubl. */
break;
case 674: /* umull */
case 673: /* umaddl */
value = 673; /* --> umaddl. */
break;
case 676: /* umnegl */
case 675: /* umsubl */
value = 675; /* --> umsubl. */
break;
case 687: /* ror */
case 686: /* extr */
value = 686; /* --> extr. */
break;
case 894: /* bic */
case 893: /* and */
value = 893; /* --> and. */
break;
case 896: /* mov */
case 895: /* orr */
value = 895; /* --> orr. */
break;
case 899: /* tst */
case 898: /* ands */
value = 898; /* --> ands. */
break;
case 904: /* uxtw */
case 903: /* mov */
case 902: /* orr */
value = 902; /* --> orr. */
break;
case 906: /* mvn */
case 905: /* orn */
value = 905; /* --> orn. */
break;
case 910: /* tst */
case 909: /* ands */
value = 909; /* --> ands. */
break;
case 1036: /* staddb */
case 940: /* ldaddb */
value = 940; /* --> ldaddb. */
break;
case 1037: /* staddh */
case 941: /* ldaddh */
value = 941; /* --> ldaddh. */
break;
case 1038: /* stadd */
case 942: /* ldadd */
value = 942; /* --> ldadd. */
break;
case 1019: /* staddlb */
case 924: /* ldaddlb */
value = 924; /* --> ldaddlb. */
case 1039: /* staddlb */
case 944: /* ldaddlb */
value = 944; /* --> ldaddlb. */
break;
case 1020: /* staddlh */
case 927: /* ldaddlh */
value = 927; /* --> ldaddlh. */
case 1040: /* staddlh */
case 947: /* ldaddlh */
value = 947; /* --> ldaddlh. */
break;
case 1021: /* staddl */
case 930: /* ldaddl */
value = 930; /* --> ldaddl. */
case 1041: /* staddl */
case 950: /* ldaddl */
value = 950; /* --> ldaddl. */
break;
case 1022: /* stclrb */
case 932: /* ldclrb */
value = 932; /* --> ldclrb. */
case 1042: /* stclrb */
case 952: /* ldclrb */
value = 952; /* --> ldclrb. */
break;
case 1023: /* stclrh */
case 933: /* ldclrh */
value = 933; /* --> ldclrh. */
case 1043: /* stclrh */
case 953: /* ldclrh */
value = 953; /* --> ldclrh. */
break;
case 1024: /* stclr */
case 934: /* ldclr */
value = 934; /* --> ldclr. */
case 1044: /* stclr */
case 954: /* ldclr */
value = 954; /* --> ldclr. */
break;
case 1025: /* stclrlb */
case 936: /* ldclrlb */
value = 936; /* --> ldclrlb. */
case 1045: /* stclrlb */
case 956: /* ldclrlb */
value = 956; /* --> ldclrlb. */
break;
case 1026: /* stclrlh */
case 939: /* ldclrlh */
value = 939; /* --> ldclrlh. */
case 1046: /* stclrlh */
case 959: /* ldclrlh */
value = 959; /* --> ldclrlh. */
break;
case 1027: /* stclrl */
case 942: /* ldclrl */
value = 942; /* --> ldclrl. */
case 1047: /* stclrl */
case 962: /* ldclrl */
value = 962; /* --> ldclrl. */
break;
case 1028: /* steorb */
case 944: /* ldeorb */
value = 944; /* --> ldeorb. */
case 1048: /* steorb */
case 964: /* ldeorb */
value = 964; /* --> ldeorb. */
break;
case 1029: /* steorh */
case 945: /* ldeorh */
value = 945; /* --> ldeorh. */
case 1049: /* steorh */
case 965: /* ldeorh */
value = 965; /* --> ldeorh. */
break;
case 1030: /* steor */
case 946: /* ldeor */
value = 946; /* --> ldeor. */
case 1050: /* steor */
case 966: /* ldeor */
value = 966; /* --> ldeor. */
break;
case 1031: /* steorlb */
case 948: /* ldeorlb */
value = 948; /* --> ldeorlb. */
case 1051: /* steorlb */
case 968: /* ldeorlb */
value = 968; /* --> ldeorlb. */
break;
case 1032: /* steorlh */
case 951: /* ldeorlh */
value = 951; /* --> ldeorlh. */
case 1052: /* steorlh */
case 971: /* ldeorlh */
value = 971; /* --> ldeorlh. */
break;
case 1033: /* steorl */
case 954: /* ldeorl */
value = 954; /* --> ldeorl. */
case 1053: /* steorl */
case 974: /* ldeorl */
value = 974; /* --> ldeorl. */
break;
case 1034: /* stsetb */
case 956: /* ldsetb */
value = 956; /* --> ldsetb. */
case 1054: /* stsetb */
case 976: /* ldsetb */
value = 976; /* --> ldsetb. */
break;
case 1035: /* stseth */
case 957: /* ldseth */
value = 957; /* --> ldseth. */
case 1055: /* stseth */
case 977: /* ldseth */
value = 977; /* --> ldseth. */
break;
case 1036: /* stset */
case 958: /* ldset */
value = 958; /* --> ldset. */
case 1056: /* stset */
case 978: /* ldset */
value = 978; /* --> ldset. */
break;
case 1037: /* stsetlb */
case 960: /* ldsetlb */
value = 960; /* --> ldsetlb. */
case 1057: /* stsetlb */
case 980: /* ldsetlb */
value = 980; /* --> ldsetlb. */
break;
case 1038: /* stsetlh */
case 963: /* ldsetlh */
value = 963; /* --> ldsetlh. */
case 1058: /* stsetlh */
case 983: /* ldsetlh */
value = 983; /* --> ldsetlh. */
break;
case 1039: /* stsetl */
case 966: /* ldsetl */
value = 966; /* --> ldsetl. */
case 1059: /* stsetl */
case 986: /* ldsetl */
value = 986; /* --> ldsetl. */
break;
case 1040: /* stsmaxb */
case 968: /* ldsmaxb */
value = 968; /* --> ldsmaxb. */
case 1060: /* stsmaxb */
case 988: /* ldsmaxb */
value = 988; /* --> ldsmaxb. */
break;
case 1041: /* stsmaxh */
case 969: /* ldsmaxh */
value = 969; /* --> ldsmaxh. */
case 1061: /* stsmaxh */
case 989: /* ldsmaxh */
value = 989; /* --> ldsmaxh. */
break;
case 1042: /* stsmax */
case 970: /* ldsmax */
value = 970; /* --> ldsmax. */
break;
case 1043: /* stsmaxlb */
case 972: /* ldsmaxlb */
value = 972; /* --> ldsmaxlb. */
break;
case 1044: /* stsmaxlh */
case 975: /* ldsmaxlh */
value = 975; /* --> ldsmaxlh. */
break;
case 1045: /* stsmaxl */
case 978: /* ldsmaxl */
value = 978; /* --> ldsmaxl. */
break;
case 1046: /* stsminb */
case 980: /* ldsminb */
value = 980; /* --> ldsminb. */
break;
case 1047: /* stsminh */
case 981: /* ldsminh */
value = 981; /* --> ldsminh. */
break;
case 1048: /* stsmin */
case 982: /* ldsmin */
value = 982; /* --> ldsmin. */
break;
case 1049: /* stsminlb */
case 984: /* ldsminlb */
value = 984; /* --> ldsminlb. */
break;
case 1050: /* stsminlh */
case 987: /* ldsminlh */
value = 987; /* --> ldsminlh. */
break;
case 1051: /* stsminl */
case 990: /* ldsminl */
value = 990; /* --> ldsminl. */
break;
case 1052: /* stumaxb */
case 992: /* ldumaxb */
value = 992; /* --> ldumaxb. */
break;
case 1053: /* stumaxh */
case 993: /* ldumaxh */
value = 993; /* --> ldumaxh. */
break;
case 1054: /* stumax */
case 994: /* ldumax */
value = 994; /* --> ldumax. */
break;
case 1055: /* stumaxlb */
case 996: /* ldumaxlb */
value = 996; /* --> ldumaxlb. */
break;
case 1056: /* stumaxlh */
case 999: /* ldumaxlh */
value = 999; /* --> ldumaxlh. */
break;
case 1057: /* stumaxl */
case 1002: /* ldumaxl */
value = 1002; /* --> ldumaxl. */
break;
case 1058: /* stuminb */
case 1004: /* lduminb */
value = 1004; /* --> lduminb. */
break;
case 1059: /* stuminh */
case 1005: /* lduminh */
value = 1005; /* --> lduminh. */
break;
case 1060: /* stumin */
case 1006: /* ldumin */
value = 1006; /* --> ldumin. */
break;
case 1061: /* stuminlb */
case 1008: /* lduminlb */
value = 1008; /* --> lduminlb. */
break;
case 1062: /* stuminlh */
case 1011: /* lduminlh */
value = 1011; /* --> lduminlh. */
break;
case 1063: /* stuminl */
case 1014: /* lduminl */
value = 1014; /* --> lduminl. */
break;
case 1065: /* mov */
case 1064: /* movn */
value = 1064; /* --> movn. */
break;
case 1067: /* mov */
case 1066: /* movz */
value = 1066; /* --> movz. */
break;
case 1080: /* psb */
case 1079: /* esb */
case 1078: /* sevl */
case 1077: /* sev */
case 1076: /* wfi */
case 1075: /* wfe */
case 1074: /* yield */
case 1073: /* nop */
case 1072: /* hint */
value = 1072; /* --> hint. */
break;
case 1089: /* tlbi */
case 1088: /* ic */
case 1087: /* dc */
case 1086: /* at */
case 1085: /* sys */
value = 1085; /* --> sys. */
case 1062: /* stsmax */
case 990: /* ldsmax */
value = 990; /* --> ldsmax. */
break;
case 1063: /* stsmaxlb */
case 992: /* ldsmaxlb */
value = 992; /* --> ldsmaxlb. */
break;
case 1064: /* stsmaxlh */
case 995: /* ldsmaxlh */
value = 995; /* --> ldsmaxlh. */
break;
case 1065: /* stsmaxl */
case 998: /* ldsmaxl */
value = 998; /* --> ldsmaxl. */
break;
case 1066: /* stsminb */
case 1000: /* ldsminb */
value = 1000; /* --> ldsminb. */
break;
case 1067: /* stsminh */
case 1001: /* ldsminh */
value = 1001; /* --> ldsminh. */
break;
case 1068: /* stsmin */
case 1002: /* ldsmin */
value = 1002; /* --> ldsmin. */
break;
case 1069: /* stsminlb */
case 1004: /* ldsminlb */
value = 1004; /* --> ldsminlb. */
break;
case 1070: /* stsminlh */
case 1007: /* ldsminlh */
value = 1007; /* --> ldsminlh. */
break;
case 1071: /* stsminl */
case 1010: /* ldsminl */
value = 1010; /* --> ldsminl. */
break;
case 1072: /* stumaxb */
case 1012: /* ldumaxb */
value = 1012; /* --> ldumaxb. */
break;
case 1073: /* stumaxh */
case 1013: /* ldumaxh */
value = 1013; /* --> ldumaxh. */
break;
case 1074: /* stumax */
case 1014: /* ldumax */
value = 1014; /* --> ldumax. */
break;
case 1075: /* stumaxlb */
case 1016: /* ldumaxlb */
value = 1016; /* --> ldumaxlb. */
break;
case 1076: /* stumaxlh */
case 1019: /* ldumaxlh */
value = 1019; /* --> ldumaxlh. */
break;
case 1077: /* stumaxl */
case 1022: /* ldumaxl */
value = 1022; /* --> ldumaxl. */
break;
case 1078: /* stuminb */
case 1024: /* lduminb */
value = 1024; /* --> lduminb. */
break;
case 1079: /* stuminh */
case 1025: /* lduminh */
value = 1025; /* --> lduminh. */
break;
case 1080: /* stumin */
case 1026: /* ldumin */
value = 1026; /* --> ldumin. */
break;
case 1081: /* stuminlb */
case 1028: /* lduminlb */
value = 1028; /* --> lduminlb. */
break;
case 1082: /* stuminlh */
case 1031: /* lduminlh */
value = 1031; /* --> lduminlh. */
break;
case 1083: /* stuminl */
case 1034: /* lduminl */
value = 1034; /* --> lduminl. */
break;
case 1085: /* mov */
case 1084: /* movn */
value = 1084; /* --> movn. */
break;
case 1087: /* mov */
case 1086: /* movz */
value = 1086; /* --> movz. */
break;
case 1100: /* psb */
case 1099: /* esb */
case 1098: /* sevl */
case 1097: /* sev */
case 1096: /* wfi */
case 1095: /* wfe */
case 1094: /* yield */
case 1093: /* nop */
case 1092: /* hint */
value = 1092; /* --> hint. */
break;
case 1109: /* tlbi */
case 1108: /* ic */
case 1107: /* dc */
case 1106: /* at */
case 1105: /* sys */
value = 1105; /* --> sys. */
break;
default: return NULL;
}

File diff suppressed because it is too large Load Diff

View File

@ -122,70 +122,70 @@ const struct aarch64_operand aarch64_operands[] =
static const unsigned op_enum_table [] =
{
0,
782,
783,
784,
787,
788,
789,
790,
791,
785,
786,
792,
793,
815,
816,
817,
820,
821,
822,
823,
824,
818,
819,
825,
826,
869,
870,
871,
872,
802,
803,
804,
807,
808,
809,
810,
811,
805,
806,
812,
813,
835,
836,
837,
840,
841,
842,
843,
844,
838,
839,
845,
846,
889,
890,
891,
892,
12,
581,
582,
1064,
1066,
1068,
876,
1067,
1065,
302,
569,
580,
579,
874,
576,
573,
565,
564,
571,
572,
575,
577,
578,
884,
597,
600,
603,
598,
601,
726,
602,
1084,
1086,
1088,
896,
1087,
1085,
302,
589,
600,
599,
894,
596,
593,
585,
584,
591,
592,
595,
597,
598,
904,
617,
620,
623,
618,
621,
746,
162,
163,
164,
165,
479,
667,
490,
687,
371,
373,
393,

View File

@ -471,6 +471,12 @@
QLF3(S_D, S_D, NIL), \
}
/* e.g. FCMEQ <V><d>, <V><n>, #0. */
#define QL_SISD_FCMP_H_0 \
{ \
QLF3 (S_H, S_H, NIL), \
}
/* e.g. FMAXNMP <V><d>, <Vn>.<T>. */
#define QL_SISD_PAIR \
{ \
@ -500,6 +506,12 @@
QLF2(S_D, S_D), \
}
/* e.g. FCVTNS <V><d>, <V><n>. */
#define QL_S_2SAMEH \
{ \
QLF2 (S_H, S_H), \
}
/* e.g. SQXTN <Vb><d>, <Va><n>. */
#define QL_SISD_NARROW \
{ \
@ -1876,16 +1888,38 @@ struct aarch64_opcode aarch64_opcode_table[] =
{"abs", 0x5e20b800, 0xff3ffc00, asisdmisc, 0, SIMD, OP2 (Sd, Sn), QL_2SAMED, F_SSIZE},
{"sqxtn", 0x5e214800, 0xff3ffc00, asisdmisc, 0, SIMD, OP2 (Sd, Sn), QL_SISD_NARROW, F_SSIZE},
{"fcvtns", 0x5e21a800, 0xffbffc00, asisdmisc, 0, SIMD, OP2 (Sd, Sn), QL_S_2SAMESD, F_SSIZE},
{"fcvtns", 0x5e79a800, 0xfffffc00, asisdmisc, 0, SIMD_F16,
OP2 (Sd, Sn), QL_S_2SAMEH, F_SSIZE},
{"fcvtms", 0x5e21b800, 0xffbffc00, asisdmisc, 0, SIMD, OP2 (Sd, Sn), QL_S_2SAMESD, F_SSIZE},
{"fcvtms", 0x5e79b800, 0xfffffc00, asisdmisc, 0, SIMD_F16,
OP2 (Sd, Sn), QL_S_2SAMEH, F_SSIZE},
{"fcvtas", 0x5e21c800, 0xffbffc00, asisdmisc, 0, SIMD, OP2 (Sd, Sn), QL_S_2SAMESD, F_SSIZE},
{"fcvtas", 0x5e79c800, 0xfffffc00, asisdmisc, 0, SIMD_F16,
OP2 (Sd, Sn), QL_S_2SAMEH, F_SSIZE},
{"scvtf", 0x5e21d800, 0xffbffc00, asisdmisc, 0, SIMD, OP2 (Sd, Sn), QL_S_2SAMESD, F_SSIZE},
{"scvtf", 0x5e79d800, 0xfffffc00, asisdmisc, 0, SIMD_F16,
OP2 (Sd, Sn), QL_S_2SAMEH, F_SSIZE},
{"fcmgt", 0x5ea0c800, 0xffbffc00, asisdmisc, 0, SIMD, OP3 (Sd, Sn, FPIMM0), QL_SISD_FCMP_0, F_SSIZE},
{"fcmgt", 0x5ef8c800, 0xfffffc00, asisdmisc, 0, SIMD_F16,
OP3 (Sd, Sn, FPIMM0), QL_SISD_FCMP_H_0, F_SSIZE},
{"fcmeq", 0x5ea0d800, 0xffbffc00, asisdmisc, 0, SIMD, OP3 (Sd, Sn, FPIMM0), QL_SISD_FCMP_0, F_SSIZE},
{"fcmeq", 0x5ef8d800, 0xfffffc00, asisdmisc, 0, SIMD_F16,
OP3 (Sd, Sn, FPIMM0), QL_SISD_FCMP_H_0, F_SSIZE},
{"fcmlt", 0x5ea0e800, 0xffbffc00, asisdmisc, 0, SIMD, OP3 (Sd, Sn, FPIMM0), QL_SISD_FCMP_0, F_SSIZE},
{"fcmlt", 0x5ef8e800, 0xfffffc00, asisdmisc, 0, SIMD_F16,
OP3 (Sd, Sn, FPIMM0), QL_SISD_FCMP_H_0, F_SSIZE},
{"fcvtps", 0x5ea1a800, 0xffbffc00, asisdmisc, 0, SIMD, OP2 (Sd, Sn), QL_S_2SAMESD, F_SSIZE},
{"fcvtps", 0x5ef9a800, 0xfffffc00, asisdmisc, 0, SIMD_F16,
OP2 (Sd, Sn), QL_S_2SAMEH, F_SSIZE},
{"fcvtzs", 0x5ea1b800, 0xffbffc00, asisdmisc, 0, SIMD, OP2 (Sd, Sn), QL_S_2SAMESD, F_SSIZE},
{"fcvtzs", 0x5ef9b800, 0xfffffc00, asisdmisc, 0, SIMD_F16,
OP2 (Sd, Sn), QL_S_2SAMEH, F_SSIZE},
{"frecpe", 0x5ea1d800, 0xffbffc00, asisdmisc, 0, SIMD, OP2 (Sd, Sn), QL_S_2SAMESD, F_SSIZE},
{"frecpe", 0x5ef9d800, 0xfffffc00, asisdmisc, 0, SIMD_F16,
OP2 (Sd, Sn), QL_S_2SAMEH, F_SSIZE},
{"frecpx", 0x5ea1f800, 0xffbffc00, asisdmisc, 0, SIMD, OP2 (Sd, Sn), QL_S_2SAMESD, F_SSIZE},
{"frecpx", 0x5ef9f800, 0xfffffc00, asisdmisc, 0, SIMD_F16,
OP2 (Sd, Sn), QL_S_2SAMEH, F_SSIZE},
{"usqadd", 0x7e203800, 0xff3ffc00, asisdmisc, 0, SIMD, OP2 (Sd, Sn), QL_S_2SAME, F_SSIZE},
{"sqneg", 0x7e207800, 0xff3ffc00, asisdmisc, 0, SIMD, OP2 (Sd, Sn), QL_S_2SAME, F_SSIZE},
{"cmge", 0x7e208800, 0xff3ffc00, asisdmisc, 0, SIMD, OP3 (Sd, Sn, IMM0), QL_SISD_CMP_0, F_SSIZE},
@ -1895,14 +1929,32 @@ struct aarch64_opcode aarch64_opcode_table[] =
{"uqxtn", 0x7e214800, 0xff3ffc00, asisdmisc, 0, SIMD, OP2 (Sd, Sn), QL_SISD_NARROW, F_SSIZE},
{"fcvtxn", 0x7e216800, 0xffbffc00, asisdmisc, OP_FCVTXN_S, SIMD, OP2 (Sd, Sn), QL_SISD_NARROW_S, F_MISC},
{"fcvtnu", 0x7e21a800, 0xffbffc00, asisdmisc, 0, SIMD, OP2 (Sd, Sn), QL_S_2SAMESD, F_SSIZE},
{"fcvtnu", 0x7e79a800, 0xfffffc00, asisdmisc, 0, SIMD_F16,
OP2 (Sd, Sn), QL_S_2SAMEH, F_SSIZE},
{"fcvtmu", 0x7e21b800, 0xffbffc00, asisdmisc, 0, SIMD, OP2 (Sd, Sn), QL_S_2SAMESD, F_SSIZE},
{"fcvtmu", 0x7e79b800, 0xfffffc00, asisdmisc, 0, SIMD_F16,
OP2 (Sd, Sn), QL_S_2SAMEH, F_SSIZE},
{"fcvtau", 0x7e21c800, 0xffbffc00, asisdmisc, 0, SIMD, OP2 (Sd, Sn), QL_S_2SAMESD, F_SSIZE},
{"fcvtau", 0x7e79c800, 0xfffffc00, asisdmisc, 0, SIMD_F16,
OP2 (Sd, Sn), QL_S_2SAMEH, F_SSIZE},
{"ucvtf", 0x7e21d800, 0xffbffc00, asisdmisc, 0, SIMD, OP2 (Sd, Sn), QL_S_2SAMESD, F_SSIZE},
{"ucvtf", 0x7e79d800, 0xfffffc00, asisdmisc, 0, SIMD_F16,
OP2 (Sd, Sn), QL_S_2SAMEH, F_SSIZE},
{"fcmge", 0x7ea0c800, 0xffbffc00, asisdmisc, 0, SIMD, OP3 (Sd, Sn, FPIMM0), QL_SISD_FCMP_0, F_SSIZE},
{"fcmge", 0x7ef8c800, 0xfffffc00, asisdmisc, 0, SIMD_F16,
OP3 (Sd, Sn, FPIMM0), QL_SISD_FCMP_H_0, F_SSIZE},
{"fcmle", 0x7ea0d800, 0xffbffc00, asisdmisc, 0, SIMD, OP3 (Sd, Sn, FPIMM0), QL_SISD_FCMP_0, F_SSIZE},
{"fcmle", 0x7ef8d800, 0xfffffc00, asisdmisc, 0, SIMD_F16,
OP3 (Sd, Sn, FPIMM0), QL_SISD_FCMP_H_0, F_SSIZE},
{"fcvtpu", 0x7ea1a800, 0xffbffc00, asisdmisc, 0, SIMD, OP2 (Sd, Sn), QL_S_2SAMESD, F_SSIZE},
{"fcvtpu", 0x7ef9a800, 0xfffffc00, asisdmisc, 0, SIMD_F16,
OP2 (Sd, Sn), QL_SISD_FCMP_H_0, F_SSIZE},
{"fcvtzu", 0x7ea1b800, 0xffbffc00, asisdmisc, 0, SIMD, OP2 (Sd, Sn), QL_S_2SAMESD, F_SSIZE},
{"fcvtzu", 0x7ef9b800, 0xfffffc00, asisdmisc, 0, SIMD_F16,
OP2 (Sd, Sn), QL_S_2SAMEH, F_SSIZE},
{"frsqrte", 0x7ea1d800, 0xffbffc00, asisdmisc, 0, SIMD, OP2 (Sd, Sn), QL_S_2SAMESD, F_SSIZE},
{"frsqrte", 0x7ef9d800, 0xfffffc00, asisdmisc, 0, SIMD_F16,
OP2 (Sd, Sn), QL_S_2SAMEH, F_SSIZE},
/* AdvSIMD scalar copy. */
{"dup", 0x5e000400, 0xffe0fc00, asisdone, 0, SIMD, OP2 (Sd, En), QL_S_2SAME, F_HAS_ALIAS},
{"mov", 0x5e000400, 0xffe0fc00, asisdone, 0, SIMD, OP2 (Sd, En), QL_S_2SAME, F_ALIAS},