Replace Vex0F, Vex0F38, Vex0F3A, XOP08, XOP09 and XOP0A with VexOpcode.

gas/

2009-12-16  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (build_vex_prefix): Replace vex0f, vex0f38,
	vex0f3a, xop08, xop09 and xop0a with vexopcode.

opcodes/

2009-12-16  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (opcode_modifiers): Remove Vex0F, Vex0F38,
	Vex0F3A, XOP08, XOP09 and XOP0A.  Add VexOpcode.

	* i386-opc.h (Vex0F): Removed.
	(Vex0F38): Likewise.
	(Vex0F3A): Likewise.
	(VexOpcode): New.
	(VEX0F): Likewise.
	(VEX0F38): Likewise.
	(VEX0F3A): Likewise.
	(XOP08): Defined as a macro.
	(XOP09): Likewise.
	(XOP0A): Likewise.
	(i386_opcode_modifier): Remove vex0f, vex0f38, vex0f3a, xop08,
	xop09 and xop0a.  Add vexopcode.

	* i386-opc.tbl: Replace Vex0F with VexOpcode=0, Vex0F38 with
	VexOpcode=1, Vex0F3A with VexOpcode=2, XOP08 with VexOpcode=3,
	XOP09 with VexOpcode=4 and XOP0A with VexOpcode=5.
	* i386-tbl.h: Regenerated.

gas/ChangeLog

@@ -1,3 +1,8 @@
+2009-12-16  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* config/tc-i386.c (build_vex_prefix): Replace vex0f, vex0f38,
+	vex0f3a, xop08, xop09 and xop0a with vexopcode.
+
 2009-12-15  H.J. Lu  <hongjiu.lu@intel.com>
 
 	* config/tc-i386.c (build_modrm_byte): Check XOP2SOURCES

gas/config/tc-i386.c

@@ -2675,7 +2675,7 @@ build_vex_prefix (const insn_template *t)
      operand.  */
   if (!i.swap_operand
       && i.operands == i.reg_operands
-      && i.tm.opcode_modifier.vex0f
+      && i.tm.opcode_modifier.vexopcode == VEX0F
       && i.tm.opcode_modifier.s
       && i.rex == REX_B)
     {
@@ -2722,7 +2722,7 @@ build_vex_prefix (const insn_template *t)
     }
 
   /* Use 2-byte VEX prefix if possible.  */
-  if (i.tm.opcode_modifier.vex0f
+  if (i.tm.opcode_modifier.vexopcode == VEX0F
       && (i.rex & (REX_W | REX_X | REX_B)) == 0)
     {
       /* 2-byte VEX prefix.  */
@@ -2746,29 +2746,32 @@ build_vex_prefix (const insn_template *t)
       i.vex.length = 3;
       i.vex.bytes[0] = 0xc4;
 
-      if (i.tm.opcode_modifier.vex0f)
+      switch (i.tm.opcode_modifier.vexopcode)
-	m = 0x1;
-      else if (i.tm.opcode_modifier.vex0f38)
-	m = 0x2;
-      else if (i.tm.opcode_modifier.vex0f3a)
-	m = 0x3;
-      else if (i.tm.opcode_modifier.xop08)
 	{
+	case VEX0F:
+	  m = 0x1;
+	  break;
+	case VEX0F38:
+	  m = 0x2;
+	  break;
+	case VEX0F3A:
+	  m = 0x3;
+	  break;
+	case XOP08:
 	  m = 0x8;
 	  i.vex.bytes[0] = 0x8f;
-	}
+	  break;
-      else if (i.tm.opcode_modifier.xop09)
+	case XOP09:
-	{
 	  m = 0x9;
 	  i.vex.bytes[0] = 0x8f;
-	}
+	  break;
-      else if (i.tm.opcode_modifier.xop0a)
+	case XOP0A:
-	{
 	  m = 0xa;
 	  i.vex.bytes[0] = 0x8f;
+	  break;
+	default:
+	  abort ();
 	}
-      else
-	abort ();
 
       /* The high 3 bits of the second VEX byte are 1's compliment
 	 of RXB bits from REX.  */

opcodes/ChangeLog

@@ -1,3 +1,26 @@
+2009-12-16  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* i386-gen.c (opcode_modifiers): Remove Vex0F, Vex0F38,
+	Vex0F3A, XOP08, XOP09 and XOP0A.  Add VexOpcode.
+
+	* i386-opc.h (Vex0F): Removed.
+	(Vex0F38): Likewise.
+	(Vex0F3A): Likewise.
+	(VexOpcode): New.
+	(VEX0F): Likewise.
+	(VEX0F38): Likewise.
+	(VEX0F3A): Likewise.
+	(XOP08): Defined as a macro.
+	(XOP09): Likewise.
+	(XOP0A): Likewise.
+	(i386_opcode_modifier): Remove vex0f, vex0f38, vex0f3a, xop08,
+	xop09 and xop0a.  Add vexopcode.
+
+	* i386-opc.tbl: Replace Vex0F with VexOpcode=0, Vex0F38 with
+	VexOpcode=1, Vex0F3A with VexOpcode=2, XOP08 with VexOpcode=3,
+	XOP09 with VexOpcode=4 and XOP0A with VexOpcode=5.
+	* i386-tbl.h: Regenerated.
+
 2009-12-15  H.J. Lu  <hongjiu.lu@intel.com>
 
 	* i386-opc.h (VEX2SOURCES): Renamed to ...

opcodes/i386-gen.c

@@ -358,12 +358,7 @@ static bitfield opcode_modifiers[] =
   BITFIELD (VexNDD),
   BITFIELD (VexLWP),
   BITFIELD (VexW),
-  BITFIELD (Vex0F),
+  BITFIELD (VexOpcode),
-  BITFIELD (Vex0F38),
-  BITFIELD (Vex0F3A),
-  BITFIELD (XOP08),
-  BITFIELD (XOP09),
-  BITFIELD (XOP0A),
   BITFIELD (VexSources),
   BITFIELD (VexImmExt),
   BITFIELD (SSE2AVX),

opcodes/i386-opc.h

@@ -294,18 +294,21 @@ enum
 #define VEXW0	1
 #define VEXW1	2
   VexW,
-  /* insn has VEX 0x0F opcode prefix. */
+  /* VEX opcode prefix:
-  Vex0F,
+     0: VEX 0x0F opcode prefix.
-  /* insn has VEX 0x0F38 opcode prefix. */
+     1: VEX 0x0F38 opcode prefix.
-  Vex0F38,
+     2: VEX 0x0F3A opcode prefix
-  /* insn has VEX 0x0F3A opcode prefix. */
+     3: XOP 0x08 opcode prefix.
-  Vex0F3A,
+     4: XOP 0x09 opcode prefix
-  /* insn has XOP 0x08 opcode prefix. */
+     5: XOP 0x0A opcode prefix.
-  XOP08,
+   */
-  /* insn has XOP 0x09 opcode prefix. */
+#define VEX0F		0
-  XOP09,
+#define VEX0F38		1
-  /* insn has XOP 0x0A opcode prefix. */
+#define VEX0F3A		2
-  XOP0A,
+#define XOP08		3
+#define XOP09		4
+#define XOP0A		5
+  VexOpcode,
   /* number of VEX source operands:
      0: <= 2 source operands.
      1: 2 XOP source operands.
@@ -377,12 +380,7 @@ typedef struct i386_opcode_modifier
   unsigned int vexndd:1;
   unsigned int vexlwp:1;
   unsigned int vexw:2;
-  unsigned int vex0f:1;
+  unsigned int vexopcode:3;
-  unsigned int vex0f38:1;
-  unsigned int vex0f3a:1;
-  unsigned int xop08:1;
-  unsigned int xop09:1;
-  unsigned int xop0a:1;
   unsigned int vexsources:2;
   unsigned int veximmext:1;
   unsigned int sse2avx:1;