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AArch64: Wire through instr_sequence
This patch introduces aarch64_instr_sequence which is a structure similar to IT blocks on Arm in order to track instructions that introduce a constraint or dependency on instruction 1..N positions away from the instruction that opened the block. The struct is also wired through to the locations that require it. gas/ * config/tc-aarch64.c (now_instr_sequence): (*insn_sequence, now_instr_sequence): New. (output_operand_error_record, do_encode): Add insn_sequence. (md_assemble): Update insn_sequence. (try_to_encode_as_unscaled_ldst, fix_mov_imm_insn, fix_insn): Pass insn_sequence. * config/tc-aarch64.h (struct aarch64_segment_info_type): Add insn_sequence. include/ * opcode/aarch64.h (struct aarch64_instr_sequence): New. (aarch64_opcode_encode): Use it. opcodes/ * aarch64-asm.c (aarch64_opcode_encode): Add insn_sequence. * aarch64-dis.c (insn_sequence): New.
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@ -662,6 +662,13 @@ empty_qualifier_sequence_p (const aarch64_opnd_qualifier_t *qualifiers)
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return TRUE;
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}
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/* Forward declare error reporting type. */
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typedef struct aarch64_operand_error aarch64_operand_error;
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/* Forward declare instruction sequence type. */
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typedef struct aarch64_instr_sequence aarch64_instr_sequence;
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/* Forward declare instruction definition. */
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typedef struct aarch64_inst aarch64_inst;
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/* This structure holds information for a particular opcode. */
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struct aarch64_opcode
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@ -1124,14 +1131,27 @@ struct aarch64_operand_error
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bfd_boolean non_fatal;
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};
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typedef struct aarch64_operand_error aarch64_operand_error;
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/* AArch64 sequence structure used to track instructions with F_SCAN
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dependencies for both assembler and disassembler. */
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struct aarch64_instr_sequence
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{
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/* The instruction that caused this sequence to be opened. */
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aarch64_inst *instr;
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/* The number of instructions the above instruction allows to be kept in the
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sequence before an automatic close is done. */
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int num_insns;
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/* The instructions currently added to the sequence. */
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aarch64_inst **current_insns;
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/* The number of instructions already in the sequence. */
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int next_insn;
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};
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/* Encoding entrypoint. */
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extern int
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aarch64_opcode_encode (const aarch64_opcode *, const aarch64_inst *,
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aarch64_insn *, aarch64_opnd_qualifier_t *,
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aarch64_operand_error *);
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aarch64_operand_error *, aarch64_instr_sequence *);
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extern const aarch64_opcode *
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aarch64_replace_opcode (struct aarch64_inst *,
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