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[ARC] Update ARC opcode table

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Update ARC opcode table by cleaning up invalid instructions, and fixing wrong encodings.

opcodes/
xxxx-xx-xx  Claudiu Zissulescu  <claziss@synopsys.com>

	* arc-ext-tbl.h (bspeek): Remove it, added to main table.
	(bspop): Likewise.
	(modapp): Likewise.
	* arc-opc.c (RAD_CHK): Add.
	* arc-tbl.h: Regenerate.

include/
xxxx-xx-xx  Claudiu Zissulescu  <claziss@synopsys.com>

	* include/opcode/arc.h (FASTMATH): Add.
	(SWITCH): Likewise.
This commit is contained in:
Claudiu Zissulescu
2019-07-24 16:46:01 +03:00
parent ef551643dc
commit 7e126ba31a
6 changed files with 2327 additions and 1525 deletions
Download Patch File Download Diff File Expand all files Collapse all files

5
include/ChangeLog
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@ -1,3 +1,8 @@
2019-07-24 Claudiu Zissulescu <claziss@synopsys.com>
* include/opcode/arc.h (FASTMATH): Add.
(SWITCH): Likewise.
2019-07-24 Alan Modra <amodra@gmail.com> 2019-07-24 Alan Modra <amodra@gmail.com>
* elf/internal.h (ELF_SECTION_IN_SEGMENT_1): Exclude non-alloc * elf/internal.h (ELF_SECTION_IN_SEGMENT_1): Exclude non-alloc

2
include/opcode/arc.h
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@ -59,6 +59,7 @@ typedef enum
EI, EI,
ENTER, ENTER,
FLOAT, FLOAT,
FASTMATH,
INVALID, INVALID,
JLI, JLI,
JUMP, JUMP,
@ -79,6 +80,7 @@ typedef enum
SJLI, SJLI,
STORE, STORE,
SUB, SUB,
SWITCH,
ULTRAIP, ULTRAIP,
XY XY
} insn_class_t; } insn_class_t;

8
opcodes/ChangeLog
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@ -1,3 +1,11 @@
2019-07-24 Claudiu Zissulescu <claziss@synopsys.com>
* arc-ext-tbl.h (bspeek): Remove it, added to main table.
(bspop): Likewise.
(modapp): Likewise.
* arc-opc.c (RAD_CHK): Add.
* arc-tbl.h: Regenerate.
2019-07-23 Kyrylo Tkachov <kyrylo.tkachov@arm.com> 2019-07-23 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
* aarch64-opc.c (aarch64_sys_regs): Add gmid_el1 entry. * aarch64-opc.c (aarch64_sys_regs): Add gmid_el1 entry.

7
opcodes/arc-ext-tbl.h
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@ -122,10 +122,3 @@ EXTINSN2OP ("dsp_fp_sqrt", ARC_OPCODE_ARCv2EM, FLOAT, QUARKSE2, 7, 45)
EXTINSN3OP ("dsp_fp_div", ARC_OPCODE_ARCv2EM, FLOAT, QUARKSE2, 7, 42) EXTINSN3OP ("dsp_fp_div", ARC_OPCODE_ARCv2EM, FLOAT, QUARKSE2, 7, 42)
EXTINSN3OP ("dsp_fp_cmp", ARC_OPCODE_ARCv2EM, FLOAT, QUARKSE1, 7, 43) EXTINSN3OP ("dsp_fp_cmp", ARC_OPCODE_ARCv2EM, FLOAT, QUARKSE1, 7, 43)
/* Bitstream extensions. */
EXTINSN2OP ("bspeek", ARC_OPCODE_ARCv2EM, BITSTREAM, NONE, 0x05, 0x2E)
EXTINSN2OP ("bspop", ARC_OPCODE_ARCv2EM, BITSTREAM, NONE, 0x05, 0x2F)
/* Special XY. */
EXTINSN2OPF ("modapp", ARC_OPCODE_ARCv2EM, XY, NONE, 0x05, 0x3E, FLAGS_NONE)

4
opcodes/arc-opc.c
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@ -1822,7 +1822,9 @@ const struct arc_operand arc_operands[] =
#define RAD (RBdup + 1) #define RAD (RBdup + 1)
{ 6, 0, 0, ARC_OPERAND_IR | ARC_OPERAND_TRUNCATE, insert_rad, 0 }, { 6, 0, 0, ARC_OPERAND_IR | ARC_OPERAND_TRUNCATE, insert_rad, 0 },
#define RCD (RAD + 1) #define RAD_CHK (RAD + 1)
{ 6, 0, 0, ARC_OPERAND_IR | ARC_OPERAND_TRUNCATE, insert_rad, 0 },
#define RCD (RAD_CHK + 1)
{ 6, 6, 0, ARC_OPERAND_IR | ARC_OPERAND_TRUNCATE, insert_rcd, 0 }, { 6, 6, 0, ARC_OPERAND_IR | ARC_OPERAND_TRUNCATE, insert_rcd, 0 },
/* The plain integer register fields. Used by short /* The plain integer register fields. Used by short

3822
opcodes/arc-tbl.h
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