diff --git a/sim/pru/pru.isa b/sim/pru/pru.isa
index b7d8b4af8b9..be8cdfd27fb 100644
--- a/sim/pru/pru.isa
+++ b/sim/pru/pru.isa
@@ -222,7 +222,7 @@ INSTRUCTION (loop,
 	     OP2 = (IO ? IMM8 + 1 : RS2_w0);
 	     if (OP2 == 0)
 	      {
-		PC = LOOPEND;
+		PC = PC + LOOP_JMPOFFS;
 	      }
 	     else
 	      {
@@ -237,7 +237,7 @@ INSTRUCTION (iloop,
 	     OP2 = (IO ? IMM8 + 1 : RS2_w0);
 	     if (OP2 == 0)
 	      {
-		PC = LOOPEND;
+		PC = PC + LOOP_JMPOFFS;
 	      }
 	     else
 	      {
diff --git a/sim/testsuite/pru/loop-zero.s b/sim/testsuite/pru/loop-zero.s
new file mode 100644
index 00000000000..65330f27beb
--- /dev/null
+++ b/sim/testsuite/pru/loop-zero.s
@@ -0,0 +1,41 @@
+# Check that loop insn works if register value is zero.
+# mach: pru
+
+# Copyright (C) 2022 Free Software Foundation, Inc.
+# Contributed by Dimitar Dimitrov <dimitar@dinux.eu>
+#
+# This file is part of the GNU simulators.
+#
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program.  If not, see <http://www.gnu.org/licenses/>.
+
+.include "testutils.inc"
+
+	start
+
+	ldi r25, 0
+	ldi r27, 0
+	ldi r28, 10
+
+	loop 1f, r25
+	add r27, r27, 1
+	add r28, r28, 1
+1:
+
+	qbne F, r25, 0
+	qbne F, r27, 0
+	qbne F, r28, 10
+
+	pass
+
+F:	fail