mirror of
https://github.com/espressif/binutils-gdb.git
synced 2025-08-06 14:49:38 +08:00
import gdb-19990422 snapshot
This commit is contained in:
Stan Shebs
237
sim/sh/interp.c
237
sim/sh/interp.c
@ -56,11 +56,19 @@
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#define DEFINE_TABLE
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#define DISASSEMBLER_TABLE
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/* Define the rate at which the simulator should poll the host
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for a quit. */
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#define POLL_QUIT_INTERVAL 0x60000
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typedef union
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{
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struct
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{
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/* On targets like sparc-sun-solaris, fregs will be aligned on a 64 bit
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boundary (because of the d member). To avoid padding between
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registers - which whould make the job of sim_fetch_register harder,
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we add padding at the start. */
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int pad_dummy;
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int regs[16];
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int pc;
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@ -84,7 +92,7 @@ typedef union
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double d[8];
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int i[16];
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}
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fregs;
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fregs[2];
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int ssr;
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int spc;
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@ -221,9 +229,34 @@ set_sr (new_sr)
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/* Manipulate FPSCR */
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#define set_fpscr1(x)
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#define SET_FPSCR(x) (saved_state.asregs.fpscr = (x))
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#define FPSCR_MASK_FR (1 << 21)
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#define FPSCR_MASK_SZ (1 << 20)
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#define FPSCR_MASK_PR (1 << 19)
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#define FPSCR_FR ((GET_FPSCR() & FPSCR_MASK_FR) != 0)
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#define FPSCR_SZ ((GET_FPSCR() & FPSCR_MASK_SZ) != 0)
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#define FPSCR_PR ((GET_FPSCR() & FPSCR_MASK_PR) != 0)
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static void
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set_fpscr1 (x)
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int x;
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{
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int old = saved_state.asregs.fpscr;
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saved_state.asregs.fpscr = (x);
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/* swap the floating point register banks */
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if ((saved_state.asregs.fpscr ^ old) & FPSCR_MASK_FR)
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{
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union fregs_u tmpf = saved_state.asregs.fregs[0];
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saved_state.asregs.fregs[0] = saved_state.asregs.fregs[1];
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saved_state.asregs.fregs[1] = tmpf;
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}
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}
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#define GET_FPSCR() (saved_state.asregs.fpscr)
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#define SET_FPSCR(x) \
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do { \
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set_fpscr1 (x); \
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} while (0)
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int
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@ -232,6 +265,21 @@ fail ()
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abort ();
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}
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int
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special_address (addr, bits_written, data)
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void *addr;
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int bits_written, data;
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{
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if ((unsigned) addr >> 24 == 0xf0 && bits_written == 32 && (data & 1) == 0)
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/* This invalidates (if not associative) or might invalidate
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(if associative) an instruction cache line. This is used for
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trampolines. Since we don't simulate the cache, this is a no-op
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as far as the simulator is concerned. */
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return 1;
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/* We can't do anything useful with the other stuff, so fail. */
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return 0;
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}
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/* This function exists solely for the purpose of setting a breakpoint to
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catch simulated bus errors when running the simulator under GDB. */
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@ -244,8 +292,14 @@ bp_holder ()
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being implemented by ../common/sim_resume.c and the below should
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make a call to sim_engine_halt */
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#define BUSERROR(addr, mask) \
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if (addr & ~mask) { saved_state.asregs.exception = SIGBUS; bp_holder (); }
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#define BUSERROR(addr, mask, bits_written, data) \
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if (addr & ~mask) \
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{ \
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if (special_address (addr, bits_written, data)) \
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return; \
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saved_state.asregs.exception = SIGBUS; \
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bp_holder (); \
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}
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/* Define this to enable register lifetime checking.
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The compiler generates "add #0,rn" insns to mark registers as invalid,
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@ -276,15 +330,98 @@ static host_callback *callback;
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/* Floating point registers */
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#define FI(n) (saved_state.asregs.fregs.i[(n)])
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#define FR(n) (saved_state.asregs.fregs.f[(n)])
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#define DR(n) (get_dr (n))
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static double
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get_dr (n)
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int n;
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{
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n = (n & ~1);
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if (host_little_endian)
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{
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union
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{
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int i[2];
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double d;
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} dr;
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dr.i[1] = saved_state.asregs.fregs[0].i[n + 0];
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dr.i[0] = saved_state.asregs.fregs[0].i[n + 1];
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return dr.d;
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}
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else
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return (saved_state.asregs.fregs[0].d[n >> 1]);
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}
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#define SET_FI(n,EXP) (saved_state.asregs.fregs.i[(n)] = (EXP))
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#define SET_FR(n,EXP) (saved_state.asregs.fregs.f[(n)] = (EXP))
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#define SET_DR(n, EXP) set_dr ((n), (EXP))
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static void
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set_dr (n, exp)
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int n;
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double exp;
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{
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n = (n & ~1);
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if (host_little_endian)
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{
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union
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{
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int i[2];
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double d;
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} dr;
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dr.d = exp;
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saved_state.asregs.fregs[0].i[n + 0] = dr.i[1];
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saved_state.asregs.fregs[0].i[n + 1] = dr.i[0];
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}
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else
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saved_state.asregs.fregs[0].d[n >> 1] = exp;
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}
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#define FP_OP(n, OP, m) (SET_FR(n, (FR(n) OP FR(m))))
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#define FP_UNARY(n, OP) (SET_FR(n, (OP (FR(n)))))
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#define FP_CMP(n, OP, m) SET_SR_T(FR(n) OP FR(m))
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#define SET_FI(n,EXP) (saved_state.asregs.fregs[0].i[(n)] = (EXP))
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#define FI(n) (saved_state.asregs.fregs[0].i[(n)])
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#define FR(n) (saved_state.asregs.fregs[0].f[(n)])
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#define SET_FR(n,EXP) (saved_state.asregs.fregs[0].f[(n)] = (EXP))
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#define XD_TO_XF(n) ((((n) & 1) << 5) | ((n) & 0x1e))
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#define XF(n) (saved_state.asregs.fregs[(n) >> 5].i[(n) & 0x1f])
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#define SET_XF(n,EXP) (saved_state.asregs.fregs[(n) >> 5].i[(n) & 0x1f] = (EXP))
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#define FP_OP(n, OP, m) \
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{ \
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if (FPSCR_PR) \
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{ \
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if (((n) & 1) || ((m) & 1)) \
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saved_state.asregs.exception = SIGILL; \
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else \
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SET_DR(n, (DR(n) OP DR(m))); \
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} \
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else \
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SET_FR(n, (FR(n) OP FR(m))); \
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} while (0)
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#define FP_UNARY(n, OP) \
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{ \
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if (FPSCR_PR) \
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{ \
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if ((n) & 1) \
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saved_state.asregs.exception = SIGILL; \
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else \
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SET_DR(n, (OP (DR(n)))); \
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} \
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else \
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SET_FR(n, (OP (FR(n)))); \
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} while (0)
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#define FP_CMP(n, OP, m) \
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{ \
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if (FPSCR_PR) \
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{ \
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if (((n) & 1) || ((m) & 1)) \
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saved_state.asregs.exception = SIGILL; \
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else \
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SET_SR_T (DR(n) OP DR(m)); \
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} \
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else \
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SET_SR_T (FR(n) OP FR(m)); \
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} while (0)
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@ -294,7 +431,7 @@ wlat_little (memory, x, value, maskl)
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{
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int v = value;
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unsigned char *p = memory + ((x) & maskl);
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BUSERROR(x, maskl);
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BUSERROR(x, maskl, 32, v);
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p[3] = v >> 24;
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p[2] = v >> 16;
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p[1] = v >> 8;
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@ -307,7 +444,7 @@ wwat_little (memory, x, value, maskw)
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{
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int v = value;
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unsigned char *p = memory + ((x) & maskw);
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BUSERROR(x, maskw);
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BUSERROR(x, maskw, 16, v);
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p[1] = v >> 8;
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p[0] = v;
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@ -320,7 +457,7 @@ wbat_any (memory, x, value, maskb)
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unsigned char *p = memory + (x & maskb);
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if (x > 0x5000000)
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IOMEM (x, 1, value);
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BUSERROR(x, maskb);
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BUSERROR(x, maskb, 8, value);
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p[0] = value;
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}
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@ -331,7 +468,7 @@ wlat_big (memory, x, value, maskl)
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{
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int v = value;
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unsigned char *p = memory + ((x) & maskl);
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BUSERROR(x, maskl);
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BUSERROR(x, maskl, 32, v);
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p[0] = v >> 24;
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p[1] = v >> 16;
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@ -345,7 +482,7 @@ wwat_big (memory, x, value, maskw)
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{
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int v = value;
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unsigned char *p = memory + ((x) & maskw);
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BUSERROR(x, maskw);
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BUSERROR(x, maskw, 16, v);
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p[0] = v >> 8;
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p[1] = v;
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@ -356,7 +493,7 @@ wbat_big (memory, x, value, maskb)
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unsigned char *memory;
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{
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unsigned char *p = memory + (x & maskb);
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BUSERROR(x, maskb);
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BUSERROR(x, maskb, 8, value);
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if (x > 0x5000000)
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IOMEM (x, 1, value);
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@ -370,7 +507,7 @@ rlat_little (memory, x, maskl)
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unsigned char *memory;
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{
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unsigned char *p = memory + ((x) & maskl);
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BUSERROR(x, maskl);
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BUSERROR(x, maskl, -32, -1);
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return (p[3] << 24) | (p[2] << 16) | (p[1] << 8) | p[0];
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}
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@ -380,7 +517,7 @@ rwat_little (memory, x, maskw)
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unsigned char *memory;
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{
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unsigned char *p = memory + ((x) & maskw);
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BUSERROR(x, maskw);
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BUSERROR(x, maskw, -16, -1);
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return (p[1] << 8) | p[0];
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}
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@ -390,7 +527,7 @@ rbat_any (memory, x, maskb)
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unsigned char *memory;
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{
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unsigned char *p = memory + ((x) & maskb);
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BUSERROR(x, maskb);
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BUSERROR(x, maskb, -8, -1);
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return p[0];
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}
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@ -400,7 +537,7 @@ rlat_big (memory, x, maskl)
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unsigned char *memory;
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{
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unsigned char *p = memory + ((x) & maskl);
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BUSERROR(x, maskl);
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BUSERROR(x, maskl, -32, -1);
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return (p[0] << 24) | (p[1] << 16) | (p[2] << 8) | p[3];
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}
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@ -410,7 +547,7 @@ rwat_big (memory, x, maskw)
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unsigned char *memory;
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{
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unsigned char *p = memory + ((x) & maskw);
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BUSERROR(x, maskw);
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BUSERROR(x, maskw, -16, -1);
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return (p[0] << 8) | p[1];
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}
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@ -426,7 +563,59 @@ rwat_big (memory, x, maskw)
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#define RSWAT(x) ((short)(RWAT(x)))
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#define RSBAT(x) (SEXT(RBAT(x)))
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#define RDAT(x, n) (do_rdat (memory, (x), (n), (little_endian)))
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static int
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do_rdat (memory, x, n, little_endian)
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char *memory;
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int x;
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int n;
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int little_endian;
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{
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int f0;
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int f1;
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int i = (n & 1);
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int j = (n & ~1);
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if (little_endian)
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{
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f0 = rlat_little (memory, x + 0, maskl);
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f1 = rlat_little (memory, x + 4, maskl);
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}
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else
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{
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f0 = rlat_big (memory, x + 0, maskl);
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f1 = rlat_big (memory, x + 4, maskl);
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}
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saved_state.asregs.fregs[i].i[(j + 0)] = f0;
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saved_state.asregs.fregs[i].i[(j + 1)] = f1;
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return 0;
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}
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#define WDAT(x, n) (do_wdat (memory, (x), (n), (little_endian)))
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static int
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do_wdat (memory, x, n, little_endian)
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char *memory;
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int x;
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int n;
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int little_endian;
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{
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int f0;
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int f1;
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int i = (n & 1);
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int j = (n & ~1);
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f0 = saved_state.asregs.fregs[i].i[(j + 0)];
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f1 = saved_state.asregs.fregs[i].i[(j + 1)];
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if (little_endian)
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{
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wlat_little (memory, (x + 0), f0, maskl);
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wlat_little (memory, (x + 4), f1, maskl);
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}
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else
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{
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wlat_big (memory, (x + 0), f0, maskl);
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wlat_big (memory, (x + 4), f1, maskl);
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}
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return 0;
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}
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#define MA(n) do { memstalls += (((pc & 3) != 0) ? (n) : ((n) - 1)); } while (0)
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@ -1070,7 +1259,7 @@ sim_resume (sd, step, siggnal)
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if (--pollcount < 0)
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{
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pollcount = 1000;
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pollcount = POLL_QUIT_INTERVAL;
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if ((*callback->poll_quit) != NULL
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&& (*callback->poll_quit) (callback))
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{
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Reference in New Issue
Block a user