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[AArch64] Fix +sve documentation

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The documentation entry for the SVE feature incorrectly said that
it was enabled by default for ARMv8-A or later.  This patch fixes
that and also mentions that +sve implies +simd.  (It also implies
+fp, but that follows by transitivity.)

gas/
	* doc/c-aarch64.texi: Fix sve entry.
This commit is contained in:
Richard Sandiford
2017-02-15 16:51:17 +00:00
parent ebf0b03c70
commit 7a2114e7a4
2 changed files with 6 additions and 2 deletions
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4
gas/ChangeLog
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@ -1,3 +1,7 @@
2017-02-15 Richard Sandiford <richard.sandiford@arm.com>
* doc/c-aarch64.texi: Fix sve entry.
2017-02-15 Claudiu Zissulescu <claziss@synopsys.com> 2017-02-15 Claudiu Zissulescu <claziss@synopsys.com>
* config/tc-arc.c (md_convert_frag): Remove @pcl relocation * config/tc-arc.c (md_convert_frag): Remove @pcl relocation

4
gas/doc/c-aarch64.texi
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@ -155,8 +155,8 @@ automatically cause those extensions to be disabled.
@tab Enable ARMv8.1 Advanced SIMD extensions. This implies @code{simd}. @tab Enable ARMv8.1 Advanced SIMD extensions. This implies @code{simd}.
@item @code{simd} @tab ARMv8-A @tab ARMv8-A or later @item @code{simd} @tab ARMv8-A @tab ARMv8-A or later
@tab Enable Advanced SIMD extensions. This implies @code{fp}. @tab Enable Advanced SIMD extensions. This implies @code{fp}.
@item @code{sve} @tab ARMv8-A @tab ARMv8-A or later @item @code{sve} @tab ARMv8-A @tab No
@tab Enable the Scalable Vector Extensions. @tab Enable the Scalable Vector Extensions. This implies @code{simd}.
@end multitable @end multitable
@node AArch64 Syntax @node AArch64 Syntax