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* config/tc-ppc.h (struct _ppc_fix_extra): New.

Browse Source 
(ppc_cpu): Declare.
	(TC_FIX_TYPE, TC_INIT_FIX_DATA): Define.
	* config/tc-ppc.c (ppu_cpu): Make global.
	(ppc_insert_operand): Add ppu_cpu parameter.
	(md_assemble): Adjust for above change.
	(md_apply_fix): Pass tc_fix_data.ppc_cpu to ppc_insert_operand.
This commit is contained in:
Alan Modra
2008-03-01 07:24:47 +00:00
parent d253b6540f
commit 783de16343
3 changed files with 34 additions and 9 deletions
Download Patch File Download Diff File Expand all files Collapse all files

10
gas/ChangeLog
View File

@ -1,3 +1,13 @@
2008-03-01 Alan Modra <amodra@bigpond.net.au>
* config/tc-ppc.h (struct _ppc_fix_extra): New.
(ppc_cpu): Declare.
(TC_FIX_TYPE, TC_INIT_FIX_DATA): Define.
* config/tc-ppc.c (ppu_cpu): Make global.
(ppc_insert_operand): Add ppu_cpu parameter.
(md_assemble): Adjust for above change.
(md_apply_fix): Pass tc_fix_data.ppc_cpu to ppc_insert_operand.
2008-02-22 Nick Clifton <nickc@redhat.com> 2008-02-22 Nick Clifton <nickc@redhat.com>
* config/tc-arm.c (do_bx): Only test EF_ARM_EABI_VERSION on ELF * config/tc-arm.c (do_bx): Only test EF_ARM_EABI_VERSION on ELF

18
gas/config/tc-ppc.c
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@ -1,6 +1,6 @@
/* tc-ppc.c -- Assemble for the PowerPC or POWER (RS/6000) /* tc-ppc.c -- Assemble for the PowerPC or POWER (RS/6000)
Copyright 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, Copyright 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003,
2004, 2005, 2006, 2007 Free Software Foundation, Inc. 2004, 2005, 2006, 2007, 2008 Free Software Foundation, Inc.
Written by Ian Lance Taylor, Cygnus Support. Written by Ian Lance Taylor, Cygnus Support.
This file is part of GAS, the GNU Assembler. This file is part of GAS, the GNU Assembler.
@ -178,6 +178,10 @@ const char ppc_symbol_chars[] = "%[";
/* The dwarf2 data alignment, adjusted for 32 or 64 bit. */ /* The dwarf2 data alignment, adjusted for 32 or 64 bit. */
int ppc_cie_data_alignment; int ppc_cie_data_alignment;
/* The type of processor we are assembling for. This is one or more
of the PPC_OPCODE flags defined in opcode/ppc.h. */
unsigned long ppc_cpu = 0;
/* The target specific pseudo-ops which we support. */ /* The target specific pseudo-ops which we support. */
@ -699,10 +703,6 @@ ppc_parse_name (const char *name, expressionS *expr)
/* Local variables. */ /* Local variables. */
/* The type of processor we are assembling for. This is one or more
of the PPC_OPCODE flags defined in opcode/ppc.h. */
static unsigned long ppc_cpu = 0;
/* Whether to target xcoff64/elf64. */ /* Whether to target xcoff64/elf64. */
static unsigned int ppc_obj64 = BFD_DEFAULT_TARGET_SIZE == 64; static unsigned int ppc_obj64 = BFD_DEFAULT_TARGET_SIZE == 64;
@ -1528,6 +1528,7 @@ static unsigned long
ppc_insert_operand (unsigned long insn, ppc_insert_operand (unsigned long insn,
const struct powerpc_operand *operand, const struct powerpc_operand *operand,
offsetT val, offsetT val,
unsigned long ppc_cpu,
char *file, char *file,
unsigned int line) unsigned int line)
{ {
@ -2484,7 +2485,7 @@ md_assemble (char *str)
else if (ex.X_op == O_register) else if (ex.X_op == O_register)
{ {
insn = ppc_insert_operand (insn, operand, ex.X_add_number, insn = ppc_insert_operand (insn, operand, ex.X_add_number,
(char *) NULL, 0); ppc_cpu, (char *) NULL, 0);
} }
else if (ex.X_op == O_constant) else if (ex.X_op == O_constant)
{ {
@ -2553,7 +2554,7 @@ md_assemble (char *str)
} }
#endif /* OBJ_ELF */ #endif /* OBJ_ELF */
insn = ppc_insert_operand (insn, operand, ex.X_add_number, insn = ppc_insert_operand (insn, operand, ex.X_add_number,
(char *) NULL, 0); ppc_cpu, (char *) NULL, 0);
} }
#ifdef OBJ_ELF #ifdef OBJ_ELF
else if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_UNUSED) else if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_UNUSED)
@ -2565,7 +2566,7 @@ md_assemble (char *str)
break; break;
case BFD_RELOC_PPC_TLS: case BFD_RELOC_PPC_TLS:
insn = ppc_insert_operand (insn, operand, ppc_obj64 ? 13 : 2, insn = ppc_insert_operand (insn, operand, ppc_obj64 ? 13 : 2,
(char *) NULL, 0); ppc_cpu, (char *) NULL, 0);
break; break;
/* We'll only use the 32 (or 64) bit form of these relocations /* We'll only use the 32 (or 64) bit form of these relocations
in constants. Instructions get the 16 bit form. */ in constants. Instructions get the 16 bit form. */
@ -5632,6 +5633,7 @@ md_apply_fix (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED)
else else
insn = bfd_getl32 ((unsigned char *) where); insn = bfd_getl32 ((unsigned char *) where);
insn = ppc_insert_operand (insn, operand, (offsetT) value, insn = ppc_insert_operand (insn, operand, (offsetT) value,
fixP->tc_fix_data.ppc_cpu,
fixP->fx_file, fixP->fx_line); fixP->fx_file, fixP->fx_line);
if (target_big_endian) if (target_big_endian)
bfd_putb32 ((bfd_vma) insn, (unsigned char *) where); bfd_putb32 ((bfd_vma) insn, (unsigned char *) where);

15
gas/config/tc-ppc.h
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@ -1,6 +1,6 @@
/* tc-ppc.h -- Header file for tc-ppc.c. /* tc-ppc.h -- Header file for tc-ppc.c.
Copyright 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, Copyright 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003,
2004, 2005, 2006, 2007 Free Software Foundation, Inc. 2004, 2005, 2006, 2007, 2008 Free Software Foundation, Inc.
Written by Ian Lance Taylor, Cygnus Support. Written by Ian Lance Taylor, Cygnus Support.
This file is part of GAS, the GNU Assembler. This file is part of GAS, the GNU Assembler.
@ -90,6 +90,19 @@ extern void ppc_handle_align (struct frag *);
&& (((FRAGP)->fr_address + (FRAGP)->insn_addr) & 3) != 0) \ && (((FRAGP)->fr_address + (FRAGP)->insn_addr) & 3) != 0) \
as_bad_where ((FRAGP)->fr_file, (FRAGP)->fr_line, \ as_bad_where ((FRAGP)->fr_file, (FRAGP)->fr_line, \
_("instruction address is not a multiple of 4")); _("instruction address is not a multiple of 4"));
/* Arrange to store the value of ppc_cpu at the site of a fixup
for later use in md_apply_fix. */
struct _ppc_fix_extra
{
unsigned long ppc_cpu;
};
extern unsigned long ppc_cpu;
#define TC_FIX_TYPE struct _ppc_fix_extra
#define TC_INIT_FIX_DATA(FIXP) \
do { (FIXP)->tc_fix_data.ppc_cpu = ppc_cpu; } while (0)
#ifdef TE_PE #ifdef TE_PE