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Fix a typo in comments for CpuFSGSBase.

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2010-07-05  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-opc.h (CpuFSGSBase): Fix a typo in comments.
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H.J. Lu
2010-07-05 16:40:32 +00:00
parent df1c40a732
commit 77321f5360
2 changed files with 6 additions and 2 deletions
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6
opcodes/ChangeLog
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@ -1,3 +1,7 @@
2010-07-05 H.J. Lu <hongjiu.lu@intel.com>
* i386-opc.h (CpuFSGSBase): Fix a typo in comments.
2010-07-03 Andreas Schwab <schwab@linux-m68k.org> 2010-07-03 Andreas Schwab <schwab@linux-m68k.org>
* ppc-dis.c (powerpc_init_dialect): Cast PPC_OPCODE_xxx to * ppc-dis.c (powerpc_init_dialect): Cast PPC_OPCODE_xxx to
@ -47,7 +51,7 @@
(cpu_flags): Add CpuXsaveopt, CpuFSGSBase, CpuRdRnd and CpuF16C. (cpu_flags): Add CpuXsaveopt, CpuFSGSBase, CpuRdRnd and CpuF16C.
* i386-opc.h (CpuXsaveopt): New. * i386-opc.h (CpuXsaveopt): New.
(CpuFSGSBase):Likewise. (CpuFSGSBase): Likewise.
(CpuRdRnd): Likewise. (CpuRdRnd): Likewise.
(CpuF16C): Likewise. (CpuF16C): Likewise.
(i386_cpu_flags): Add cpuxsaveopt, cpufsgsbase, cpurdrnd and (i386_cpu_flags): Add cpuxsaveopt, cpufsgsbase, cpurdrnd and

2
opcodes/i386-opc.h
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@ -114,7 +114,7 @@ enum
CpuEPT, CpuEPT,
/* RDTSCP Instuction support required */ /* RDTSCP Instuction support required */
CpuRdtscp, CpuRdtscp,
/* FSBSBASE Instructions required */ /* FSGSBASE Instructions required */
CpuFSGSBase, CpuFSGSBase,
/* RDRND Instructions required */ /* RDRND Instructions required */
CpuRdRnd, CpuRdRnd,