espressif/binutils-gdb
1
0
Fork 0
mirror of https://github.com/espressif/binutils-gdb.git synced 2025-06-25 04:49:54 +08:00
Code Issues Packages Projects Releases Wiki Activity

ld/ARM: Increase maximum page size to 64kB

Browse Source 
Increase the maximum page size to 64kB and align the TEXT_START_ADDR
to a 64kB boundary. This brings AArch32 in line with AArch64 and
improves compatability under certain conditions.

bfd/ChangeLog:

2014-07-08  Will Newton  <will.newton@linaro.org>

	* elf32-arm.c (ELF_MAXPAGESIZE): Increase the default
	value to 64kB and remove custom setting for NaCl.

ld/ChangeLog:

2014-07-08  Will Newton  <will.newton@linaro.org>

	* emulparams/armelf_linux.sh (TEXT_START_ADDR): Increase
	alignment to 64kB boundary.

ld/testsuite/ChangeLog:

2014-07-08  Will Newton  <will.newton@linaro.org>

	* ld-arm/arm-lib.ld: Increase MAXPAGESIZE value to
	match bfd.
	* ld-arm/cortex-a8-fix-bl-rel-plt.d: Update offsets to
	take into account increased segment alignment.
	* ld-arm/ifunc-gdesc.r: Likewise.
	* ld-arm/tls-lib.d: Likewise.
This commit is contained in:
Will Newton
2014-06-26 15:23:31 +01:00
parent 8335d6aa34
commit 7572ca8989
9 changed files with 29 additions and 12 deletions
Download Patch File Download Diff File Expand all files Collapse all files

5
bfd/ChangeLog
View File

@ -1,3 +1,8 @@
2014-07-08 Will Newton <will.newton@linaro.org>
* elf32-arm.c (ELF_MAXPAGESIZE): Increase the default
value to 64kB and remove custom setting for NaCl.
2014-07-08 Alan Modra <amodra@gmail.com> 2014-07-08 Alan Modra <amodra@gmail.com>
* elflink.c (_bfd_elf_copy_link_hash_symbol_type): Copy st_other * elflink.c (_bfd_elf_copy_link_hash_symbol_type): Copy st_other

4
bfd/elf32-arm.c
View File

@ -16100,7 +16100,7 @@ elf32_arm_get_synthetic_symtab (bfd *abfd,
#ifdef __QNXTARGET__ #ifdef __QNXTARGET__
#define ELF_MAXPAGESIZE 0x1000 #define ELF_MAXPAGESIZE 0x1000
#else #else
#define ELF_MAXPAGESIZE 0x8000 #define ELF_MAXPAGESIZE 0x10000
#endif #endif
#define ELF_MINPAGESIZE 0x1000 #define ELF_MINPAGESIZE 0x1000
#define ELF_COMMONPAGESIZE 0x1000 #define ELF_COMMONPAGESIZE 0x1000
@ -16250,8 +16250,6 @@ elf32_arm_nacl_plt_sym_val (bfd_vma i, const asection *plt,
#undef elf_backend_plt_sym_val #undef elf_backend_plt_sym_val
#define elf_backend_plt_sym_val elf32_arm_nacl_plt_sym_val #define elf_backend_plt_sym_val elf32_arm_nacl_plt_sym_val
#undef ELF_MAXPAGESIZE
#define ELF_MAXPAGESIZE 0x10000
#undef ELF_MINPAGESIZE #undef ELF_MINPAGESIZE
#undef ELF_COMMONPAGESIZE #undef ELF_COMMONPAGESIZE

5
ld/ChangeLog
View File

@ -1,3 +1,8 @@
2014-07-08 Will Newton <will.newton@linaro.org>
* emulparams/armelf_linux.sh (TEXT_START_ADDR): Increase
alignment to 64kB boundary.
2014-07-04 Alan Modra <amodra@gmail.com> 2014-07-04 Alan Modra <amodra@gmail.com>
* configure.ac: Update "configure.in" comments. * configure.ac: Update "configure.in" comments.

2
ld/emulparams/armelf_linux.sh
View File

@ -17,7 +17,7 @@ OTHER_BSS_END_SYMBOLS='_bss_end__ = . ; __bss_end__ = . ;'
OTHER_END_SYMBOLS='__end__ = . ;' OTHER_END_SYMBOLS='__end__ = . ;'
OTHER_SECTIONS='.note.gnu.arm.ident 0 : { KEEP (*(.note.gnu.arm.ident)) }' OTHER_SECTIONS='.note.gnu.arm.ident 0 : { KEEP (*(.note.gnu.arm.ident)) }'
TEXT_START_ADDR=0x00008000 TEXT_START_ADDR=0x00010000
TARGET2_TYPE=got-rel TARGET2_TYPE=got-rel
# ARM does not support .s* sections. # ARM does not support .s* sections.

9
ld/testsuite/ChangeLog
View File

@ -1,3 +1,12 @@
2014-07-08 Will Newton <will.newton@linaro.org>
* ld-arm/arm-lib.ld: Increase MAXPAGESIZE value to
match bfd.
* ld-arm/cortex-a8-fix-bl-rel-plt.d: Update offsets to
take into account increased segment alignment.
* ld-arm/ifunc-gdesc.r: Likewise.
* ld-arm/tls-lib.d: Likewise.
2014-07-08 Jiong Wang <jiong.wang@arm.com> 2014-07-08 Jiong Wang <jiong.wang@arm.com>
* ld-aarch64/emit-relocs-local-addend-bar.s: New source file. * ld-aarch64/emit-relocs-local-addend-bar.s: New source file.

2
ld/testsuite/ld-arm/arm-lib.ld
View File

@ -75,7 +75,7 @@ SECTIONS
.gcc_except_table : ONLY_IF_RO { KEEP (*(.gcc_except_table)) *(.gcc_except_table.*) } .gcc_except_table : ONLY_IF_RO { KEEP (*(.gcc_except_table)) *(.gcc_except_table.*) }
/* Adjust the address for the data segment. We want to adjust up to /* Adjust the address for the data segment. We want to adjust up to
the same address within the page on the next page up. */ the same address within the page on the next page up. */
. = ALIGN (0x8000) - ((0x8000 - .) & (0x8000 - 1)); . = DATA_SEGMENT_ALIGN (0x8000, 0x1000); . = ALIGN (0x10000) - ((0x10000 - .) & (0x10000 - 1)); . = DATA_SEGMENT_ALIGN (0x10000, 0x1000);
/* Exception handling */ /* Exception handling */
.eh_frame : ONLY_IF_RW { KEEP (*(.eh_frame)) } .eh_frame : ONLY_IF_RW { KEEP (*(.eh_frame)) }
.gcc_except_table : ONLY_IF_RW { KEEP (*(.gcc_except_table)) *(.gcc_except_table.*) } .gcc_except_table : ONLY_IF_RW { KEEP (*(.gcc_except_table)) *(.gcc_except_table.*) }

4
ld/testsuite/ld-arm/cortex-a8-fix-bl-rel-plt.d
View File

@ -9,10 +9,10 @@ Disassembly of section \.plt:
8e04: e59fe004 ldr lr, \[pc, #4\] ; 8e10 <targetfn@plt-0x4> 8e04: e59fe004 ldr lr, \[pc, #4\] ; 8e10 <targetfn@plt-0x4>
8e08: e08fe00e add lr, pc, lr 8e08: e08fe00e add lr, pc, lr
8e0c: e5bef008 ldr pc, \[lr, #8\]! 8e0c: e5bef008 ldr pc, \[lr, #8\]!
8e10: 0000827c \.word 0x0000827c 8e10: 0001027c \.word 0x0001027c
00008e14 <targetfn@plt>: 00008e14 <targetfn@plt>:
8e14: e28fc600 add ip, pc, #0, 12 8e14: e28fc600 add ip, pc, #0, 12
8e18: e28cca08 add ip, ip, #8, 20 ; 0x8000 8e18: e28cca10 add ip, ip, #16, 20 ; 0x10000
8e1c: e5bcf27c ldr pc, \[ip, #636\]! ; 0x27c 8e1c: e5bcf27c ldr pc, \[ip, #636\]! ; 0x27c
Disassembly of section \.text: Disassembly of section \.text:

6
ld/testsuite/ld-arm/ifunc-gdesc.r
View File

@ -1,6 +1,6 @@
tmpdir/ifunc-gdesc.so: file format elf32-(big|little)arm tmpdir/ifunc-gdesc.so: file format elf32-(big|little)arm
DYNAMIC RELOCATION RECORDS DYNAMIC RELOCATION RECORDS
OFFSET TYPE VALUE OFFSET TYPE VALUE
0000825c R_ARM_IRELATIVE \*ABS\* 0001025c R_ARM_IRELATIVE \*ABS\*
00008248 R_ARM_TLS_DESC \*ABS\* 00010248 R_ARM_TLS_DESC \*ABS\*
00008250 R_ARM_TLS_DESC \*ABS\* 00010250 R_ARM_TLS_DESC \*ABS\*

4
ld/testsuite/ld-arm/tls-lib.d
View File

@ -10,6 +10,6 @@ Disassembly of section .text:
.*: e1a00000 nop ; \(mov r0, r0\) .*: e1a00000 nop ; \(mov r0, r0\)
.*: e1a00000 nop ; \(mov r0, r0\) .*: e1a00000 nop ; \(mov r0, r0\)
.*: e1a0f00e mov pc, lr .*: e1a0f00e mov pc, lr
.*: 00008098 .word 0x00008098 .*: 00010098 .word 0x00010098
.*: 0000808c .word 0x0000808c .*: 0001008c .word 0x0001008c
.*: 00000004 .word 0x00000004 .*: 00000004 .word 0x00000004