diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog
index d831693708d..65743a7f705 100644
--- a/gas/testsuite/ChangeLog
+++ b/gas/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+2008-01-23  Tristan Gingold  <gingold@adacore.com>
+
+	* gas/ia64/regs.d: Updated as the ia64 disassembler now displays
+	symbolic names for all ar registers.
+
 2008-01-22  H.J. Lu  <hongjiu.lu@intel.com>
 
 	* gas/i386/arch-10.d: New.
diff --git a/gas/testsuite/gas/ia64/regs.d b/gas/testsuite/gas/ia64/regs.d
index 389487de5b9..b10e68ee25f 100644
--- a/gas/testsuite/gas/ia64/regs.d
+++ b/gas/testsuite/gas/ia64/regs.d
@@ -1952,28 +1952,28 @@ Disassembly of section \.text:
 [ 	]*[a-f0-9]+:	10 00 4c 44 08 00 	            mov.m r1=ar.rnat
 [ 	]*[a-f0-9]+:	00 00 04 00       	            nop.i 0x0;;
 [ 	]*[a-f0-9]+:	09 00 00 00 01 00 	\[MMI\]       nop.m 0x0
-[ 	]*[a-f0-9]+:	10 00 54 44 08 00 	            mov.m r1=ar21
+[ 	]*[a-f0-9]+:	10 00 54 44 08 00 	            mov.m r1=ar.fcr
 [ 	]*[a-f0-9]+:	00 00 04 00       	            nop.i 0x0;;
 [ 	]*[a-f0-9]+:	09 00 00 00 01 00 	\[MMI\]       nop.m 0x0
-[ 	]*[a-f0-9]+:	10 00 60 44 08 00 	            mov.m r1=ar24
+[ 	]*[a-f0-9]+:	10 00 60 44 08 00 	            mov.m r1=ar.eflag
 [ 	]*[a-f0-9]+:	00 00 04 00       	            nop.i 0x0;;
 [ 	]*[a-f0-9]+:	09 00 00 00 01 00 	\[MMI\]       nop.m 0x0
-[ 	]*[a-f0-9]+:	10 00 64 44 08 00 	            mov.m r1=ar25
+[ 	]*[a-f0-9]+:	10 00 64 44 08 00 	            mov.m r1=ar.csd
 [ 	]*[a-f0-9]+:	00 00 04 00       	            nop.i 0x0;;
 [ 	]*[a-f0-9]+:	09 00 00 00 01 00 	\[MMI\]       nop.m 0x0
-[ 	]*[a-f0-9]+:	10 00 68 44 08 00 	            mov.m r1=ar26
+[ 	]*[a-f0-9]+:	10 00 68 44 08 00 	            mov.m r1=ar.ssd
 [ 	]*[a-f0-9]+:	00 00 04 00       	            nop.i 0x0;;
 [ 	]*[a-f0-9]+:	09 00 00 00 01 00 	\[MMI\]       nop.m 0x0
-[ 	]*[a-f0-9]+:	10 00 6c 44 08 00 	            mov.m r1=ar27
+[ 	]*[a-f0-9]+:	10 00 6c 44 08 00 	            mov.m r1=ar.cflg
 [ 	]*[a-f0-9]+:	00 00 04 00       	            nop.i 0x0;;
 [ 	]*[a-f0-9]+:	09 00 00 00 01 00 	\[MMI\]       nop.m 0x0
-[ 	]*[a-f0-9]+:	10 00 70 44 08 00 	            mov.m r1=ar28
+[ 	]*[a-f0-9]+:	10 00 70 44 08 00 	            mov.m r1=ar.fsr
 [ 	]*[a-f0-9]+:	00 00 04 00       	            nop.i 0x0;;
 [ 	]*[a-f0-9]+:	09 00 00 00 01 00 	\[MMI\]       nop.m 0x0
-[ 	]*[a-f0-9]+:	10 00 74 44 08 00 	            mov.m r1=ar29
+[ 	]*[a-f0-9]+:	10 00 74 44 08 00 	            mov.m r1=ar.fir
 [ 	]*[a-f0-9]+:	00 00 04 00       	            nop.i 0x0;;
 [ 	]*[a-f0-9]+:	09 00 00 00 01 00 	\[MMI\]       nop.m 0x0
-[ 	]*[a-f0-9]+:	10 00 78 44 08 00 	            mov.m r1=ar30
+[ 	]*[a-f0-9]+:	10 00 78 44 08 00 	            mov.m r1=ar.fdr
 [ 	]*[a-f0-9]+:	00 00 04 00       	            nop.i 0x0;;
 [ 	]*[a-f0-9]+:	09 00 00 00 01 00 	\[MMI\]       nop.m 0x0
 [ 	]*[a-f0-9]+:	10 00 80 44 08 00 	            mov.m r1=ar.ccv