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* config/bfin-defs.h (IS_BREG, IS_LREG): New macros.

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* config/bfin-parse.y (asm_1): Check register type for load immediate
	instruction.
This commit is contained in:
Jie Zhang
2005-11-18 14:21:29 +00:00
parent a2140d4d10
commit 73562ad0c7
3 changed files with 18 additions and 0 deletions
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6
gas/ChangeLog
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@ -1,3 +1,9 @@
2005-11-18 Jie Zhang <jie.zhang@analog.com>
* config/bfin-defs.h (IS_BREG, IS_LREG): New macros.
* config/bfin-parse.y (asm_1): Check register type for load immediate
instruction.
2005-11-17 Alexandre Oliva <aoliva@redhat.com> 2005-11-17 Alexandre Oliva <aoliva@redhat.com>
* config/tc-ppc.c (ppc_frob_file_before_adjust): Do not reference * config/tc-ppc.c (ppc_frob_file_before_adjust): Do not reference

2
gas/config/bfin-defs.h
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@ -199,6 +199,8 @@ enum reg_class
#define IS_PREG(r) _TYPECHECK(r, P) #define IS_PREG(r) _TYPECHECK(r, P)
#define IS_IREG(r) (((r).regno & 0xf4) == T_REG_I) #define IS_IREG(r) (((r).regno & 0xf4) == T_REG_I)
#define IS_MREG(r) (((r).regno & 0xf4) == T_REG_M) #define IS_MREG(r) (((r).regno & 0xf4) == T_REG_M)
#define IS_BREG(r) (((r).regno & 0xf4) == T_REG_B)
#define IS_LREG(r) (((r).regno & 0xf4) == T_REG_L)
#define IS_CREG(r) ((r).regno == REG_LC0 || (r).regno == REG_LC1) #define IS_CREG(r) ((r).regno == REG_LC0 || (r).regno == REG_LC1)
#define IS_ALLREG(r) ((r).regno < T_NOGROUP) #define IS_ALLREG(r) ((r).regno < T_NOGROUP)

10
gas/config/bfin-parse.y
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@ -1189,8 +1189,14 @@ asm_1:
| HALF_REG ASSIGN expr | HALF_REG ASSIGN expr
{ {
notethat ("LDIMMhalf: pregs_half = imm16\n"); notethat ("LDIMMhalf: pregs_half = imm16\n");
if (!IS_DREG ($1) && !IS_PREG ($1) && !IS_IREG ($1)
&& !IS_MREG ($1) && !IS_BREG ($1) && !IS_LREG ($1))
return yyerror ("Wrong register for load immediate");
if (!IS_IMM ($3, 16) && !IS_UIMM ($3, 16)) if (!IS_IMM ($3, 16) && !IS_UIMM ($3, 16))
return yyerror ("Constant out of range"); return yyerror ("Constant out of range");
$$ = LDIMMHALF_R (&$1, IS_H ($1), 0, 0, $3); $$ = LDIMMHALF_R (&$1, IS_H ($1), 0, 0, $3);
} }
@ -1206,6 +1212,10 @@ asm_1:
| REG ASSIGN expr xpmod1 | REG ASSIGN expr xpmod1
{ {
if (!IS_DREG ($1) && !IS_PREG ($1) && !IS_IREG ($1)
&& !IS_MREG ($1) && !IS_BREG ($1) && !IS_LREG ($1))
return yyerror ("Wrong register for load immediate");
if ($4.r0 == 0) if ($4.r0 == 0)
{ {
/* 7 bit immediate value if possible. /* 7 bit immediate value if possible.