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Fix the V850 assembler's generation of relocations for the st.b instruction.

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PR 28292
gas	* config/tc-v850.c (handle_lo16): Also accept
	BFD_RELOC_V850_LO16_SPLIT_OFFSET.
	* testsuite/gas/v850/split-lo16.s: Add extra line.
	* testsuite/gas/v850/split-lo16.d: Update expected disassembly.

opcodes	* v850-opc.c (D16): Use BFD_RELOC_V850_LO16_SPLIT_OFFSET in place
	of BFD_RELOC_16.
This commit is contained in:
Nick Clifton
2021-09-02 12:16:10 +01:00
parent b03b65e2aa
commit 718aefcf55
6 changed files with 41 additions and 25 deletions
Download Patch File Download Diff File Expand all files Collapse all files

8
gas/ChangeLog
View File

@ -1,3 +1,11 @@
2021-09-02 Nick Clifton <nickc@redhat.com>
PR 28292
* config/tc-v850.c (handle_lo16): Also accept
BFD_RELOC_V850_LO16_SPLIT_OFFSET.
* testsuite/gas/v850/split-lo16.s: Add extra line.
* testsuite/gas/v850/split-lo16.d: Update expected disassembly.
2021-08-11 Darius Galis <darius.galis@cyberthorstudios.com>
* config/rx-parse.y (DECNT): Fixed typo.

31
gas/config/tc-v850.c
View File

@ -1713,7 +1713,7 @@ md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED,
/* Now create the conditional branch + fixup to the final target. */
/* 0x000107ea = bne LBL(disp17). */
md_number_to_chars ((char *) buffer + 2, 0x000107ea, 4);
fix_new (fragP, fragP->fr_fix+2, 4, fragP->fr_symbol,
fix_new (fragP, fragP->fr_fix + 2, 4, fragP->fr_symbol,
fragP->fr_offset, 1,
BFD_RELOC_V850_17_PCREL);
fragP->fr_fix += 6;
@ -2021,21 +2021,18 @@ handle_lo16 (const struct v850_operand *operand, const char **errmsg)
if (operand == NULL)
return BFD_RELOC_LO16;
if (operand->default_reloc == BFD_RELOC_LO16)
return BFD_RELOC_LO16;
if (operand->default_reloc == BFD_RELOC_V850_16_SPLIT_OFFSET)
return BFD_RELOC_V850_LO16_SPLIT_OFFSET;
if (operand->default_reloc == BFD_RELOC_V850_16_S1)
return BFD_RELOC_V850_LO16_S1;
if (operand->default_reloc == BFD_RELOC_16)
return BFD_RELOC_LO16;
switch (operand->default_reloc)
{
case BFD_RELOC_LO16: return BFD_RELOC_LO16;
case BFD_RELOC_V850_LO16_SPLIT_OFFSET: return BFD_RELOC_V850_LO16_SPLIT_OFFSET;
case BFD_RELOC_V850_16_SPLIT_OFFSET: return BFD_RELOC_V850_LO16_SPLIT_OFFSET;
case BFD_RELOC_V850_16_S1: return BFD_RELOC_V850_LO16_S1;
case BFD_RELOC_16: return BFD_RELOC_LO16;
default:
*errmsg = _("lo() relocation used on an instruction which does "
"not support it");
return BFD_RELOC_64; /* Used to indicate an error condition. */
}
}
static bfd_reloc_code_real_type
@ -2157,15 +2154,15 @@ v850_reloc_prefix (const struct v850_operand *operand, const char **errmsg)
return reloc; \
}
CHECK_ ("hi0", handle_hi016(operand, errmsg) );
CHECK_ ("hi", handle_hi16(operand, errmsg) );
CHECK_ ("lo", handle_lo16 (operand, errmsg) );
CHECK_ ("hi0", handle_hi016 (operand, errmsg));
CHECK_ ("hi", handle_hi16 (operand, errmsg));
CHECK_ ("lo", handle_lo16 (operand, errmsg));
CHECK_ ("sdaoff", handle_sdaoff (operand, errmsg));
CHECK_ ("zdaoff", handle_zdaoff (operand, errmsg));
CHECK_ ("tdaoff", handle_tdaoff (operand, errmsg));
CHECK_ ("hilo", BFD_RELOC_32);
CHECK_ ("lo23", BFD_RELOC_V850_23);
CHECK_ ("ctoff", handle_ctoff (operand, errmsg) );
CHECK_ ("ctoff", handle_ctoff (operand, errmsg));
/* Restore skipped parenthesis. */
if (paren_skipped)

4
gas/testsuite/gas/v850/split-lo16.d
View File

@ -8,11 +8,13 @@
4: 01 16 00 00 addi 0, r1, r2
6: R_V8.* foo
8: 01 17 00 00 ld\.b 0\[r1\], r2
a: R_V8.* foo
8: R_V8.* foo
c: 81 17 01 00 ld\.bu 0\[r1\], r2
c: R_V8.* foo
10: a1 17 45 23 ld\.bu 9029\[r1\], r2
14: 81 17 57 34 ld\.bu 13398\[r1\], r2
18: 20 57 01 00 ld.w 0\[r0\], r10
1c: 20 57 79 56 ld.w 22136\[r0\], r10
20: 40 57 00 00 st.b r10, 0\[r0\]
20: R_V8.* VSWC
#pass

3
gas/testsuite/gas/v850/split-lo16.s
View File

@ -8,3 +8,6 @@
ld.w lo(0)[r0], r10
ld.w lo(0x12345678)[r0], r10
# This is from PR 28292
st.b r10, VSWC[r0]

6
opcodes/ChangeLog
View File

@ -1,3 +1,9 @@
2021-09-02 Nick Clifton <nickc@redhat.com>
PR 28292
* v850-opc.c (D16): Use BFD_RELOC_V850_LO16_SPLIT_OFFSET in place
of BFD_RELOC_16.
2021-08-17 Shahab Vahedi <shahab@synopsys.com>
* arc-regs.h (DEF): Fix the register numbers.

2
opcodes/v850-opc.c
View File

@ -1190,7 +1190,7 @@ const struct v850_operand v850_operands[] =
/* The disp16 field in a format 8 insn. */
#define D16 (I16U + 1)
{ 16, 16, NULL, NULL, V850_OPERAND_SIGNED | V850_OPERAND_DISP, BFD_RELOC_16 },
{ 16, 16, NULL, NULL, V850_OPERAND_SIGNED | V850_OPERAND_DISP, BFD_RELOC_V850_LO16_SPLIT_OFFSET },
/* The disp16 field in an format 7 unsigned byte load insn. */
#define D16_16 (D16 + 1)