RISC-V: Add T-Head MemPair vendor extension

T-Head has a range of vendor-specific instructions.
Therefore it makes sense to group them into smaller chunks
in form of vendor extensions.

This patch adds the XTheadMemPair extension, a collection of T-Head specific
two-GP-register memory operations.
The 'th' prefix and the "XTheadMemPair" extension are documented in a PR
for the RISC-V toolchain conventions ([1]).

[1] https://github.com/riscv-non-isa/riscv-toolchain-conventions/pull/19

Co-developed-by: Lifang Xia <lifang_xia@linux.alibaba.com>
Signed-off-by: Christoph Müllner <christoph.muellner@vrull.eu>

include/opcode/riscv.h

@@ -423,6 +423,7 @@ enum riscv_insn_class
   INSN_CLASS_XTHEADFMEMIDX,
   INSN_CLASS_XTHEADMAC,
   INSN_CLASS_XTHEADMEMIDX,
+  INSN_CLASS_XTHEADMEMPAIR,
   INSN_CLASS_XTHEADSYNC,
 };