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* config/tc-m68k.c (m68k_ip): Mismatch error could also indicate

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processor/opcode mismatch, so reword the error message.
        (md_assemble): If no CPU has been set (even if FPU/PMMU
        characteristics have been), default to 68020.  Don't need extra
        quotes around error string.
This commit is contained in:
Ken Raeburn
1992-08-01 02:26:13 +00:00
parent 03bb29bf79
commit 6d27d3a205
1 changed files with 1395 additions and 1530 deletions
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151
gas/config/tc-m68k.c
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@ -975,12 +975,8 @@ char *instring;
register struct m68k_op *opP; register struct m68k_op *opP;
register struct m68k_incant *opcode; register struct m68k_incant *opcode;
register char *s; register char *s;
register int tmpreg = 0, register int tmpreg = 0, baseo = 0, outro = 0, nextword;
baseo = 0, int siz1, siz2;
outro = 0,
nextword;
int siz1,
siz2;
char c; char c;
int losing; int losing;
int opsfound; int opsfound;
@ -1384,7 +1380,7 @@ char *instring;
opcode = opcode->m_next; opcode = opcode->m_next;
if (!opcode) { if (!opcode) {
the_ins.error = "instruction/operands mismatch"; the_ins.error = "instruction/operands mismatch or invalid\n instruction for this architecture";
return; return;
} /* Fell off the end */ } /* Fell off the end */
@ -2587,7 +2583,7 @@ char *str;
int shorts_this_frag; int shorts_this_frag;
if (current_architecture == 0) { if (current_architecture == 0)
current_architecture = (m68020 current_architecture = (m68020
#ifndef NO_68881 #ifndef NO_68881
| m68881 | m68881
@ -2596,7 +2592,9 @@ char *str;
| m68851 | m68851
#endif #endif
); );
} /* default current_architecture */ /* If only float and mmu were specified, default cpu. */
else if (cpu_of_arch (current_architecture) == 0)
current_architecture |= m68020;
memset((char *)(&the_ins), '\0', sizeof(the_ins)); /* JF for paranoia sake */ memset((char *)(&the_ins), '\0', sizeof(the_ins)); /* JF for paranoia sake */
m68k_ip(str); m68k_ip(str);
@ -2609,7 +2607,7 @@ char *str;
} }
} }
if(er) { if(er) {
as_bad("\"%s\" -- Statement '%s' ignored",er,str); as_bad("%s -- statement `%s' ignored",er,str);
return; return;
} }
@ -2725,141 +2723,8 @@ char *str;
} }
} }
/* This function is called once, at assembler startup time. This should
set up all the tables, etc that the MD part of the assembler needs
*/
void
insert_reg(regname, regnum)
char *regname;
int regnum;
{
char buf[100];
int i;
symbol_table_insert(symbol_new(regname, SEG_REGISTER, regnum, &zero_address_frag));
for (i = 0; regname[i]; i++)
buf[i] = islower (regname[i]) ? toupper (regname[i]) : regname[i];
buf[i] = '\0';
symbol_table_insert(symbol_new(buf, SEG_REGISTER, regnum, &zero_address_frag));
}
static struct {
char *name;
int number;
} init_table[] =
{
"d0", DATA0,
"d1", DATA1,
"d2", DATA2,
"d3", DATA3,
"d4", DATA4,
"d5", DATA5,
"d6", DATA6,
"d7", DATA7,
"a0", ADDR0,
"a1", ADDR1,
"a2", ADDR2,
"a3", ADDR3,
"a4", ADDR4,
"a5", ADDR5,
"a6", ADDR6,
"fp", ADDR6,
"a7", ADDR7,
"sp", ADDR7,
"fp0", FP0,
"fp1", FP1,
"fp2", FP2,
"fp3", FP3,
"fp4", FP4,
"fp5", FP5,
"fp6", FP6,
"fp7", FP7,
"fpi", FPI,
"fps", FPS,
"fpc", FPC,
"cop0", COP0,
"cop1", COP1,
"cop2", COP2,
"cop3", COP3,
"cop4", COP4,
"cop5", COP5,
"cop6", COP6,
"cop7", COP7,
"pc", PC,
"zpc", ZPC,
"sr", SR,
"ccr", CCR,
"cc", CCR,
"usp", USP,
"isp", ISP,
"sfc", SFC,
"dfc", DFC,
"cacr", CACR,
"caar", CAAR,
"vbr", VBR,
"msp", MSP,
"itt0", ITT0,
"itt1", ITT1,
"dtt0", DTT0,
"dtt1", DTT1,
"mmusr", MMUSR,
"tc", TC,
"srp", SRP,
"urp", URP,
#ifndef NO_68851
"ac", AC,
"bc", BC,
"cal", CAL,
"crp", CRP,
"drp", DRP,
"pcsr", PCSR,
"psr", PSR,
"scc", SCC,
"val", VAL,
"bad0", BAD0,
"bad1", BAD1,
"bad2", BAD2,
"bad3", BAD3,
"bad4", BAD4,
"bad5", BAD5,
"bad6", BAD6,
"bad7", BAD7,
"bac0", BAC0,
"bac1", BAC1,
"bac2", BAC2,
"bac3", BAC3,
"bac4", BAC4,
"bac5", BAC5,
"bac6", BAC6,
"bac7", BAC7,
#endif
"ic", IC,
"dc", DC,
"nc", NC,
0,
};
void
init_regtable()
{
int i;
for (i = 0; init_table[i].name; i++)
{
insert_reg(init_table[i].name, init_table[i].number);
}
}
void void