* Makefile.in (SIM_OBJS): Add sim-load.o.

* interp.c (sim_kind, myname): New static locals.
	(sim_open): Set sim_kind, myname.  Ignore -E arg.
	(sim_load): Return SIM_RC.  New arg abfd.  Call sim_load_file to
	load file into simulator.  Set start address from bfd.
	(sim_create_inferior): Return SIM_RC.  Delete arg start_address.
This commit is contained in:
David Edelsohn
1997-04-17 10:27:47 +00:00
parent 9d52bcb7f0
commit 6cc6987e1e
2 changed files with 155 additions and 34 deletions

View File

@ -1,3 +1,12 @@
Thu Apr 17 03:26:59 1997 Doug Evans <dje@canuck.cygnus.com>
* Makefile.in (SIM_OBJS): Add sim-load.o.
* interp.c (sim_kind, myname): New static locals.
(sim_open): Set sim_kind, myname. Ignore -E arg.
(sim_load): Return SIM_RC. New arg abfd. Call sim_load_file to
load file into simulator. Set start address from bfd.
(sim_create_inferior): Return SIM_RC. Delete arg start_address.
Wed Apr 16 19:30:44 1997 Andrew Cagney <cagney@b1.cygnus.com> Wed Apr 16 19:30:44 1997 Andrew Cagney <cagney@b1.cygnus.com>
* simops.c (OP_F020): SYS_execv, SYS_time, SYS_times, SYS_utime * simops.c (OP_F020): SYS_execv, SYS_time, SYS_times, SYS_utime

View File

@ -14,6 +14,8 @@
host_callback *mn10300_callback; host_callback *mn10300_callback;
int mn10300_debug; int mn10300_debug;
static SIM_OPEN_KIND sim_kind;
static char *myname;
static struct hash_entry *lookup_hash PARAMS ((uint32 ins, int)); static struct hash_entry *lookup_hash PARAMS ((uint32 ins, int));
static long hash PARAMS ((long)); static long hash PARAMS ((long));
@ -269,11 +271,12 @@ static void
init_system () init_system ()
{ {
if (!State.mem) if (!State.mem)
sim_size(18); sim_size(19);
} }
int int
sim_write (addr, buffer, size) sim_write (sd, addr, buffer, size)
SIM_DESC sd;
SIM_ADDR addr; SIM_ADDR addr;
unsigned char *buffer; unsigned char *buffer;
int size; int size;
@ -288,20 +291,29 @@ sim_write (addr, buffer, size)
return size; return size;
} }
void SIM_DESC
sim_open (args) sim_open (kind,argv)
char *args; SIM_OPEN_KIND kind;
char **argv;
{ {
struct simops *s; struct simops *s;
struct hash_entry *h; struct hash_entry *h;
if (args != NULL) char **p;
sim_kind = kind;
myname = argv[0];
for (p = argv + 1; *p; ++p)
{ {
if (strcmp (*p, "-E") == 0)
++p; /* ignore endian spec */
else
#ifdef DEBUG #ifdef DEBUG
if (strcmp (args, "-t") == 0) if (strcmp (*p, "-t") == 0)
mn10300_debug = DEBUG; mn10300_debug = DEBUG;
else else
#endif #endif
(*mn10300_callback->printf_filtered) (mn10300_callback, "ERROR: unsupported option(s): %s\n",args); (*mn10300_callback->printf_filtered) (mn10300_callback, "ERROR: unsupported option(s): %s\n",*p);
} }
/* put all the opcodes in the hash table */ /* put all the opcodes in the hash table */
@ -322,11 +334,15 @@ sim_open (args)
h->mask = s->mask; h->mask = s->mask;
h->opcode = s->opcode; h->opcode = s->opcode;
} }
/* fudge our descriptor for now */
return (SIM_DESC) 1;
} }
void void
sim_close (quitting) sim_close (sd, quitting)
SIM_DESC sd;
int quitting; int quitting;
{ {
/* nothing to do */ /* nothing to do */
@ -347,7 +363,8 @@ sim_set_profile_size (n)
} }
void void
sim_resume (step, siggnal) sim_resume (sd, step, siggnal)
SIM_DESC sd;
int step, siggnal; int step, siggnal;
{ {
uint32 inst; uint32 inst;
@ -389,7 +406,8 @@ sim_resume (step, siggnal)
|| (inst & 0xfc) == 0xd0 || (inst & 0xfc) == 0xd0
|| (inst & 0xfc) == 0xd4 || (inst & 0xfc) == 0xd4
|| (inst & 0xfc) == 0xd8 || (inst & 0xfc) == 0xd8
|| (inst & 0xf0) == 0xe0) || (inst & 0xf0) == 0xe0
|| (inst & 0xff) == 0xff)
{ {
insn = inst; insn = inst;
h = lookup_hash (insn, 1); h = lookup_hash (insn, 1);
@ -447,7 +465,20 @@ sim_resume (step, siggnal)
insn = load_mem_big (PC, 3); insn = load_mem_big (PC, 3);
h = lookup_hash (insn, 3); h = lookup_hash (insn, 3);
extension = 0; extension = 0;
(h->ops->func)(insn, extension); /* If it's a format D1 insn, "ret", or "retf" insn, then
there's no need to worry about endianness. Others have
a 16bit immediate in little endian form that we need to
extract. */
if (h->ops->format == FMT_D1
|| h->opcode == 0xdf0000
|| h->opcode == 0xde0000)
(h->ops->func)(insn, extension);
else
{
insn &= 0xff0000;
insn |= load_mem (PC + 1, 2);
(h->ops->func)(insn, extension);
}
PC += 3; PC += 3;
} }
@ -458,7 +489,19 @@ sim_resume (step, siggnal)
insn = load_mem_big (PC, 4); insn = load_mem_big (PC, 4);
h = lookup_hash (insn, 4); h = lookup_hash (insn, 4);
extension = 0; extension = 0;
(h->ops->func)(); /* This must be a format D2 insn; a small number of such insns
don't have any 16bit immediates (they instead have two 8 bit
immediates). */
if (h->opcode == 0xfaf80000
|| h->opcode == 0xfaf00000
|| h->opcode == 0xfaf40000)
(h->ops->func)(insn, extension);
else
{
insn &= 0xffff0000;
insn |= load_mem (PC + 2, 2);
(h->ops->func)(insn, extension);
}
PC += 4; PC += 4;
} }
@ -468,7 +511,28 @@ sim_resume (step, siggnal)
{ {
insn = load_mem_big (PC, 4); insn = load_mem_big (PC, 4);
h = lookup_hash (insn, 5); h = lookup_hash (insn, 5);
extension = load_mem_big (PC + 4, 1);
/* This must be a format S4 insn. */
if (h->opcode == 0xdc000000)
{
/* A "jmp" instruction with a 32bit immediate stored
in little endian form. */
unsigned long temp;
temp = load_mem (PC + 1, 4);
insn &= 0xff000000;
insn |= (temp & 0xffffff00) >> 8;
extension = temp & 0xff;
}
else
{
/* A "call" instruction with a 16bit immediate in little
endian form. */
unsigned long temp;
temp = load_mem (PC + 1, 2);
insn &= 0xff0000ff;
insn |= temp << 8;
extension = load_mem (PC + 4, 1);
}
(h->ops->func)(insn, extension); (h->ops->func)(insn, extension);
PC += 5; PC += 5;
} }
@ -477,9 +541,15 @@ sim_resume (step, siggnal)
else if ((inst & 0xff) == 0xfd else if ((inst & 0xff) == 0xfd
|| (inst & 0xff) == 0xfc) || (inst & 0xff) == 0xfc)
{ {
unsigned long temp;
insn = load_mem_big (PC, 4); insn = load_mem_big (PC, 4);
h = lookup_hash (insn, 6); h = lookup_hash (insn, 6);
extension = load_mem_big (PC + 4, 2);
temp = load_mem (PC + 2, 4);
insn &= 0xffff0000;
insn |= (temp >> 16) & 0xffff;
extension = temp & 0xffff;
(h->ops->func)(insn, extension); (h->ops->func)(insn, extension);
PC += 6; PC += 6;
} }
@ -489,7 +559,29 @@ sim_resume (step, siggnal)
{ {
insn = load_mem_big (PC, 4); insn = load_mem_big (PC, 4);
h = lookup_hash (insn, 7); h = lookup_hash (insn, 7);
extension = load_mem_big (PC + 4, 3);
if (h->ops->format == FMT_S6)
{
unsigned long temp;
temp = load_mem (PC + 1, 4);
insn &= 0xff000000;
insn |= (temp >> 8) & 0xffffff;
extension = (temp & 0xff) << 16;
extension |= load_mem (PC + 5, 1) << 8;
extension |= load_mem (PC + 6, 1);
}
else
{
unsigned long temp;
temp = load_mem (PC + 2, 4);
insn &= 0xffff0000;
insn |= (temp >> 16) & 0xffff;
extension = (temp & 0xffff) << 8;
extension = load_mem (PC + 6, 1);
}
(h->ops->func)(insn, extension); (h->ops->func)(insn, extension);
PC += 7; PC += 7;
} }
@ -498,39 +590,43 @@ sim_resume (step, siggnal)
} }
int int
sim_trace () sim_trace (sd)
SIM_DESC sd;
{ {
#ifdef DEBUG #ifdef DEBUG
mn10300_debug = DEBUG; mn10300_debug = DEBUG;
#endif #endif
sim_resume (0, 0); sim_resume (sd, 0, 0);
return 1; return 1;
} }
void void
sim_info (verbose) sim_info (sd, verbose)
SIM_DESC sd;
int verbose; int verbose;
{ {
(*mn10300_callback->printf_filtered) (mn10300_callback, "sim_info\n"); (*mn10300_callback->printf_filtered) (mn10300_callback, "sim_info\n");
} }
void SIM_RC
sim_create_inferior (start_address, argv, env) sim_create_inferior (sd, argv, env)
SIM_ADDR start_address; SIM_DESC sd;
char **argv; char **argv;
char **env; char **env;
{ {
PC = start_address; return SIM_RC_OK;
} }
void void
sim_kill () sim_kill (sd)
SIM_DESC sd;
{ {
/* nothing to do */ /* nothing to do */
} }
void void
sim_set_callbacks (p) sim_set_callbacks (sd, p)
SIM_DESC sd;
host_callback *p; host_callback *p;
{ {
mn10300_callback = p; mn10300_callback = p;
@ -541,7 +637,8 @@ sim_set_callbacks (p)
This is enough to get c-torture limping though. */ This is enough to get c-torture limping though. */
void void
sim_stop_reason (reason, sigrc) sim_stop_reason (sd, reason, sigrc)
SIM_DESC sd;
enum sim_stop *reason; enum sim_stop *reason;
int *sigrc; int *sigrc;
{ {
@ -553,7 +650,8 @@ sim_stop_reason (reason, sigrc)
} }
void void
sim_fetch_register (rn, memory) sim_fetch_register (sd, rn, memory)
SIM_DESC sd;
int rn; int rn;
unsigned char *memory; unsigned char *memory;
{ {
@ -561,7 +659,8 @@ sim_fetch_register (rn, memory)
} }
void void
sim_store_register (rn, memory) sim_store_register (sd, rn, memory)
SIM_DESC sd;
int rn; int rn;
unsigned char *memory; unsigned char *memory;
{ {
@ -569,7 +668,8 @@ sim_store_register (rn, memory)
} }
int int
sim_read (addr, buffer, size) sim_read (sd, addr, buffer, size)
SIM_DESC sd;
SIM_ADDR addr; SIM_ADDR addr;
unsigned char *buffer; unsigned char *buffer;
int size; int size;
@ -582,17 +682,29 @@ sim_read (addr, buffer, size)
} }
void void
sim_do_command (cmd) sim_do_command (sd, cmd)
SIM_DESC sd;
char *cmd; char *cmd;
{ {
(*mn10300_callback->printf_filtered) (mn10300_callback, "\"%s\" is not a valid mn10300 simulator command.\n", cmd); (*mn10300_callback->printf_filtered) (mn10300_callback, "\"%s\" is not a valid mn10300 simulator command.\n", cmd);
} }
int SIM_RC
sim_load (prog, from_tty) sim_load (sd, prog, abfd, from_tty)
SIM_DESC sd;
char *prog; char *prog;
bfd *abfd;
int from_tty; int from_tty;
{ {
/* Return nonzero so GDB will handle it. */ extern bfd *sim_load_file (); /* ??? Don't know where this should live. */
return 1; bfd *prog_bfd;
prog_bfd = sim_load_file (sd, myname, mn10300_callback, prog, abfd,
sim_kind == SIM_OPEN_DEBUG);
if (prog_bfd == NULL)
return SIM_RC_FAIL;
PC = bfd_get_start_address (prog_bfd);
if (abfd == NULL)
bfd_close (prog_bfd);
return SIM_RC_OK;
} }