RISC-V: Add 'Smstateen' extension and its CSRs

This commit adds State Enable Extension (Smstateen) and its CSRs.

bfd/ChangeLog:

	* elfxx-riscv.c (riscv_supported_std_s_ext): Add 'Smstateen'
	extension to valid 'S' extension list.

gas/ChangeLog:

	* config/tc-riscv.c (enum riscv_csr_class): Add CSR classes for
	'Smstateen' extension. (riscv_csr_address): Add handling for
	new CSR classes.
	* testsuite/gas/riscv/csr-dw-regnums.s: Add new CSRs.
	* testsuite/gas/riscv/csr-dw-regnums.d: Likewise.
	* testsuite/gas/riscv/csr.s: Add new CSRs.
	* testsuite/gas/riscv/csr-version-1p9p1.d: Likewise.
	* testsuite/gas/riscv/csr-version-1p9p1.l: Likewise.
	* testsuite/gas/riscv/csr-version-1p10.d: Likewise.
	* testsuite/gas/riscv/csr-version-1p10.l: Likewise.
	* testsuite/gas/riscv/csr-version-1p11.d: Likewise.
	* testsuite/gas/riscv/csr-version-1p11.l: Likewise.
	* testsuite/gas/riscv/csr-version-1p12.d: Likewise.
	* testsuite/gas/riscv/csr-version-1p12.l: Likewise.

include/ChangeLog:

	* opcode/riscv-opc.h (CSR_MSTATEEN0, CSR_MSTATEEN1,
	CSR_MSTATEEN2, CSR_MSTATEEN3, CSR_SSTATEEN0, CSR_SSTATEEN1,
	CSR_SSTATEEN2, CSR_SSTATEEN3, CSR_HSTATEEN0, CSR_HSTATEEN1,
	CSR_HSTATEEN2, CSR_HSTATEEN3, CSR_MSTATEEN0H, CSR_MSTATEEN1H,
	CSR_MSTATEEN2H, CSR_MSTATEEN3H, CSR_HSTATEEN0H, CSR_HSTATEEN1H,
	CSR_HSTATEEN2H, CSR_HSTATEEN3H): New CSR macros.
This commit is contained in:
Tsukasa OI
2022-06-24 11:51:54 +09:00
committed by Nelson Chu
parent 39590abd65
commit 6af47b081e
14 changed files with 568 additions and 0 deletions

View File

@ -2432,6 +2432,27 @@
#define CSR_UIP 0x44
#define CSR_SEDELEG 0x102
#define CSR_SIDELEG 0x103
/* Smstateen extension */
#define CSR_MSTATEEN0 0x30c
#define CSR_MSTATEEN1 0x30d
#define CSR_MSTATEEN2 0x30e
#define CSR_MSTATEEN3 0x30f
#define CSR_SSTATEEN0 0x10c
#define CSR_SSTATEEN1 0x10d
#define CSR_SSTATEEN2 0x10e
#define CSR_SSTATEEN3 0x10f
#define CSR_HSTATEEN0 0x60c
#define CSR_HSTATEEN1 0x60d
#define CSR_HSTATEEN2 0x60e
#define CSR_HSTATEEN3 0x60f
#define CSR_MSTATEEN0H 0x31c
#define CSR_MSTATEEN1H 0x31d
#define CSR_MSTATEEN2H 0x31e
#define CSR_MSTATEEN3H 0x31f
#define CSR_HSTATEEN0H 0x61c
#define CSR_HSTATEEN1H 0x61d
#define CSR_HSTATEEN2H 0x61e
#define CSR_HSTATEEN3H 0x61f
/* Unprivileged Floating-Point CSR addresses. */
#define CSR_FFLAGS 0x1
#define CSR_FRM 0x2
@ -3097,6 +3118,27 @@ DECLARE_CSR(vscause, CSR_VSCAUSE, CSR_CLASS_H, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_C
DECLARE_CSR(vstval, CSR_VSTVAL, CSR_CLASS_H, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
DECLARE_CSR(vsip, CSR_VSIP, CSR_CLASS_H, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
DECLARE_CSR(vsatp, CSR_VSATP, CSR_CLASS_H, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
/* Smstateen extension */
DECLARE_CSR(mstateen0, CSR_MSTATEEN0, CSR_CLASS_SMSTATEEN, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
DECLARE_CSR(mstateen1, CSR_MSTATEEN1, CSR_CLASS_SMSTATEEN, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
DECLARE_CSR(mstateen2, CSR_MSTATEEN2, CSR_CLASS_SMSTATEEN, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
DECLARE_CSR(mstateen3, CSR_MSTATEEN3, CSR_CLASS_SMSTATEEN, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
DECLARE_CSR(sstateen0, CSR_SSTATEEN0, CSR_CLASS_SMSTATEEN, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
DECLARE_CSR(sstateen1, CSR_SSTATEEN1, CSR_CLASS_SMSTATEEN, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
DECLARE_CSR(sstateen2, CSR_SSTATEEN2, CSR_CLASS_SMSTATEEN, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
DECLARE_CSR(sstateen3, CSR_SSTATEEN3, CSR_CLASS_SMSTATEEN, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
DECLARE_CSR(hstateen0, CSR_HSTATEEN0, CSR_CLASS_SMSTATEEN_AND_H, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
DECLARE_CSR(hstateen1, CSR_HSTATEEN1, CSR_CLASS_SMSTATEEN_AND_H, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
DECLARE_CSR(hstateen2, CSR_HSTATEEN2, CSR_CLASS_SMSTATEEN_AND_H, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
DECLARE_CSR(hstateen3, CSR_HSTATEEN3, CSR_CLASS_SMSTATEEN_AND_H, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
DECLARE_CSR(mstateen0h, CSR_MSTATEEN0H, CSR_CLASS_SMSTATEEN_32, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
DECLARE_CSR(mstateen1h, CSR_MSTATEEN1H, CSR_CLASS_SMSTATEEN_32, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
DECLARE_CSR(mstateen2h, CSR_MSTATEEN2H, CSR_CLASS_SMSTATEEN_32, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
DECLARE_CSR(mstateen3h, CSR_MSTATEEN3H, CSR_CLASS_SMSTATEEN_32, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
DECLARE_CSR(hstateen0h, CSR_HSTATEEN0H, CSR_CLASS_SMSTATEEN_AND_H_32, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
DECLARE_CSR(hstateen1h, CSR_HSTATEEN1H, CSR_CLASS_SMSTATEEN_AND_H_32, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
DECLARE_CSR(hstateen2h, CSR_HSTATEEN2H, CSR_CLASS_SMSTATEEN_AND_H_32, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
DECLARE_CSR(hstateen3h, CSR_HSTATEEN3H, CSR_CLASS_SMSTATEEN_AND_H_32, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
/* Dropped CSRs. */
DECLARE_CSR(mbase, CSR_MBASE, CSR_CLASS_I, PRIV_SPEC_CLASS_1P9P1, PRIV_SPEC_CLASS_1P10)
DECLARE_CSR(mbound, CSR_MBOUND, CSR_CLASS_I, PRIV_SPEC_CLASS_1P9P1, PRIV_SPEC_CLASS_1P10)