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* config/tc-m68hc11.c: Add S12X and XGATE co-processor support.
Add option to offset S12 addresses into XGATE memory space. Tweak target flags to match other tools. (i.e. -m m68hc11). * doc/as.texinfo: Mention new options. * doc/c-m68hc11.texi: Document new options. * NEWS: Mention new support. * archures.c: Add bfd_arch_m9s12x and bfd_arch_m9s12xg. * config.bfd: Likewise. * cpu-m9s12x.c: New. * cpu-m9s12xg.c: New. * elf32-m68hc12.c: Add S12X and XGATE co-processor support. Add option to offset S12 addresses into XGATE memory space. Fix carry bug in IMM16 (IMM8 low/high) relocate. * Makefile.am (ALL_MACHINES): Add cpu-m9s12x and cpu-m9s12xg. (ALL_MACHINES_CFILES): Likewise. * reloc.c: Add S12X relocs. * Makefile.in: Regenerate. * bfd-in2.h: Regenerate. * libbfd.h: Regenerate. * gas/m68hc11/insns9s12x.s: New * gas/m68hc11/insns9s12x.d: New * gas/m68hc11/hexprefix.s: New * gas/m68hc11/hexprefix.d: New * gas/m68hc11/9s12x-exg-sex-tfr.s: New * gas/m68hc11/9s12x-exg-sex-tfr.d: New * gas/m68hc11/insns9s12xg.s: New * gas/m68hc11/insns9s12xg.d: New * gas/m68hc11/9s12x-mov.s: New * gas/m68hc11/9s12x-mov.d: New * gas/m68hc11/m68hc11.exp: Updated * gas/m68hc11/*.d: Brought in line with changed objdump output. * gas/all/gas.exp: XFAIL all hc11/12 targets for redef2,3. * gas/elf/elf.exp: XFAIL all hc11/12 targets for redef. * gas/elf/dwarf2-1.d: Skip for hc11/12 targets. * gas/elf/dwarf2-2.d: Likewise. * ld-m68hc11/xgate-link.s: New. * ld-m68hc11/xgate-link.d: New. * ld-m68hc11/xgate-offset.s: New. * ld-m68hc11/xgate-offset.d: New. * ld-m68hc11/xgate1.s: New. * ld-m68hc11/xgate1.d: New. * ld-m68hc11/xgate2.s: New. * ld-m68hc11/m68hc11.exp: Updated. * ld-m68hc11/*.d: Brought in line with changed objdump output. * ld-gc/gc.exp: Update CFLAGS for m68hc11. * ld-plugin/plugin.exp: Likewise. * ld-srec/srec.exp: XFAIL for m68hc11 and m68hc12. * configure.in: Add S12X and XGATE co-processor support to m68hc11 target. * disassemble.c: Likewise. * configure: Regenerate. * m68hc11-dis.c: Make objdump output more consistent, use hex instead of decimal and use 0x prefix for hex. * m68hc11-opc.c: Add S12X and XGATE opcodes. * dis-asm.h (print_insn_m9s12x): Prototype. (print_insn_m9s12xg): Prototype. * m68hc11.h (R_M68HC12_16B, R_M68HC12_PCREL_9, R_M68HC12_PCREL_10) R_M68HC12_HI8XG, R_M68HC12_LO8XG): New relocations. (E_M68HC11_XGATE_RAMOFFSET): Define. * m68hc11.h: Add XGate definitions. (struct m68hc11_opcode): Add xg_mask field.
This commit is contained in:
Nick Clifton
@ -1,8 +1,13 @@
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2012-05-15 James Murray <jsm@jsm-net.demon.co.uk>
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* m68hc11.h: Add XGate definitions.
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(struct m68hc11_opcode): Add xg_mask field.
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2012-05-14 Catherine Moore <clm@codesourcery.com>
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Maciej W. Rozycki <macro@codesourcery.com>
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Rhonda Wittels <rhonda@codesourcery.com>
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* ppc.h (PPC_OPCODE_VLE): New definition.
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* ppc.h (PPC_OPCODE_VLE): New definition.
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(PPC_OP_SA): New macro.
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(PPC_OP_SE_VLE): New macro.
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(PPC_OP): Use a variable shift amount.
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@ -1,5 +1,6 @@
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/* m68hc11.h -- Header file for Motorola 68HC11 & 68HC12 opcode table
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Copyright 1999, 2000, 2002, 2003, 2010 Free Software Foundation, Inc.
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Copyright 1999, 2000, 2002, 2003, 2010, 2012
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Free Software Foundation, Inc.
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Written by Stephane Carrez (stcarrez@nerim.fr)
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This file is part of GDB, GAS, and the GNU binutils.
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@ -37,8 +38,7 @@
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of the M6811_INIT register. At init time, the I/O registers are
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mapped at 0x1000. Address of registers is then:
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0x1000 + M6811_xxx
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*/
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0x1000 + M6811_xxx. */
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#define M6811_PORTA 0x00 /* Port A register */
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#define M6811__RES1 0x01 /* Unused/Reserved */
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#define M6811_PIOC 0x02 /* Parallel I/O Control register */
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@ -364,6 +364,26 @@
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#define M6812_INDEXED 0x20000000 /* n,r n = 5, 9 or 16-bits */
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#define M6812_OP_IDX_P2 0x40000000
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/* XGATE defines.
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These overlap with HC11/12 as above but not used at the same time. */
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#define M68XG_OP_NONE 0x0001
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#define M68XG_OP_IMM3 0x0002
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#define M68XG_OP_R 0x0004
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#define M68XG_OP_R_R 0x0008
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#define M68XG_OP_R_IMM4 0x0010
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#define M68XG_OP_R_R_R 0x0020
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#define M68XG_OP_REL9 0x0040
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#define M68XG_OP_REL10 0x0080
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#define M68XG_OP_R_R_OFFS5 0x0100
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#define M68XG_OP_RD_RB_RI 0x0200
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#define M68XG_OP_RD_RB_RIp 0x0400
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#define M68XG_OP_RD_RB_mRI 0x0800
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#define M68XG_OP_R_IMM8 0x1000
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#define M68XG_OP_R_IMM16 0x2000
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#define M68XG_OP_REG 0x4000 /* Register operand 1. */
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#define M68XG_OP_REG_2 0x8000 /* Register operand 2. */
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#define M68XG_MAX_OPERANDS 3 /* Max operands of triadic r1, r2, r3. */
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/* Markers to identify some instructions. */
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#define M6812_OP_EXG_MARKER 0x01000000 /* exg r1,r2 */
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#define M6812_OP_TFR_MARKER 0x02000000 /* tfr r1,r2 */
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@ -374,35 +394,43 @@
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#define M6812_OP_IBCC_MARKER 0x02000000 /* ibeq/ibne */
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#define M6812_OP_TBCC_MARKER 0x01000000
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/* XGATE markers. */
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#define M68XG_OP_B_MARKER 0x04000000 /* bXX rel9 */
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#define M68XG_OP_BRA_MARKER 0x02000000 /* bra rel10 */
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#define M6812_OP_TRAP_ID 0x80000000 /* trap #N */
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#define M6811_OP_HIGH_ADDR 0x01000000 /* Used internally by gas. */
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#define M6811_OP_LOW_ADDR 0x02000000
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#define M68HC12_BANK_VIRT 0x010000
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#define M68HC12_BANK_MASK 0x00003fff
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#define M68HC12_BANK_BASE 0x00008000
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#define M68HC12_BANK_SHIFT 14
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#define M68HC12_BANK_PAGE_MASK 0x0ff
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#define M68HC12_BANK_VIRT 0x010000
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#define M68HC12_BANK_MASK 0x00003fff
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#define M68HC12_BANK_BASE 0x00008000
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#define M68HC12_BANK_SHIFT 14
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#define M68HC12_BANK_PAGE_MASK 0x0ff
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/* CPU identification. */
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#define cpu6811 0x01
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#define cpu6812 0x02
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#define cpu6812s 0x04
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#define cpu9s12x 0x08 /* 9S12X main cpu. */
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#define cpuxgate 0x10 /* The XGATE module itself. */
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/* The opcode table is an array of struct m68hc11_opcode. */
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struct m68hc11_opcode {
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const char* name; /* Op-code name */
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struct m68hc11_opcode
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{
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const char * name; /* Op-code name. */
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long format;
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unsigned char size;
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unsigned char opcode;
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unsigned int opcode;
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unsigned char cycles_low;
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unsigned char cycles_high;
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unsigned char set_flags_mask;
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unsigned char clr_flags_mask;
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unsigned char chg_flags_mask;
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unsigned char arch;
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unsigned int xg_mask; /* Mask with zero in register place for xgate. */
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};
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/* Alias definition for 68HC12. */
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