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Add support for the GBZ80, Z180, and eZ80 variants of the Z80 architecure. Add an ELF based target for these as well.
PR 25224 bfd * Makefile.am: Add z80-elf target support. * configure.ac: Likewise. * targets.c: Likewise. * config.bfd: Add z80-elf target support and new arches: ez80 and z180. * elf32-z80.c: New file. * archures.c: Add new z80 architectures: eZ80 and Z180. * coffcode.h: Likewise. * cpu-z80.c: Likewise. * bfd-in2.h: Likewise plus additional Z80 relocations. * coff-z80.c: Add new relocations for Z80 target and local label check. gas * config/tc-z80.c: Add new architectures: Z180 and eZ80. Add support for assembler code generated by SDCC. Add new relocation types. Add z80-elf target support. * config/tc-z80.h: Add z80-elf target support. Enable dollar local labels. Local labels starts from ".L". * testsuite/gas/all/fwdexp.d: Fix failure due to symbol conflict. * testsuite/gas/all/fwdexp.s: Likewise. * testsuite/gas/z80/suffix.d: Fix failure on ELF target. * testsuite/gas/z80/z80.exp: Add new tests * testsuite/gas/z80/dollar.d: New file. * testsuite/gas/z80/dollar.s: New file. * testsuite/gas/z80/ez80_adl_all.d: New file. * testsuite/gas/z80/ez80_adl_all.s: New file. * testsuite/gas/z80/ez80_adl_suf.d: New file. * testsuite/gas/z80/ez80_isuf.s: New file. * testsuite/gas/z80/ez80_z80_all.d: New file. * testsuite/gas/z80/ez80_z80_all.s: New file. * testsuite/gas/z80/ez80_z80_suf.d: New file. * testsuite/gas/z80/r800_extra.d: New file. * testsuite/gas/z80/r800_extra.s: New file. * testsuite/gas/z80/r800_ii8.d: New file. * testsuite/gas/z80/r800_z80_doc.d: New file. * testsuite/gas/z80/z180.d: New file. * testsuite/gas/z80/z180.s: New file. * testsuite/gas/z80/z180_z80_doc.d: New file. * testsuite/gas/z80/z80_doc.d: New file. * testsuite/gas/z80/z80_doc.s: New file. * testsuite/gas/z80/z80_ii8.d: New file. * testsuite/gas/z80/z80_ii8.s: New file. * testsuite/gas/z80/z80_in_f_c.d: New file. * testsuite/gas/z80/z80_in_f_c.s: New file. * testsuite/gas/z80/z80_op_ii_ld.d: New file. * testsuite/gas/z80/z80_op_ii_ld.s: New file. * testsuite/gas/z80/z80_out_c_0.d: New file. * testsuite/gas/z80/z80_out_c_0.s: New file. * testsuite/gas/z80/z80_reloc.d: New file. * testsuite/gas/z80/z80_reloc.s: New file. * testsuite/gas/z80/z80_sli.d: New file. * testsuite/gas/z80/z80_sli.s: New file. ld * Makefile.am: Add new target z80-elf * configure.tgt: Likewise. * emultempl/z80.em: Add support for eZ80 and Z180 architectures. * emulparams/elf32z80.sh: New file. * emultempl/z80elf.em: Likewise. * testsuite/ld-z80/arch_ez80_adl.d: Likewise. * testsuite/ld-z80/arch_ez80_z80.d: Likewise. * testsuite/ld-z80/arch_r800.d: Likewise. * testsuite/ld-z80/arch_z180.d: Likewise. * testsuite/ld-z80/arch_z80.d: Likewise. * testsuite/ld-z80/comb_arch_ez80_z80.d: Likewise. * testsuite/ld-z80/comb_arch_z180.d: Likewise. * testsuite/ld-z80/labels.s: Likewise. * testsuite/ld-z80/relocs.s: Likewise. * testsuite/ld-z80/relocs_b_ez80.d: Likewise. * testsuite/ld-z80/relocs_b_z80.d: Likewise. * testsuite/ld-z80/relocs_f_z80.d: Likewise. * testsuite/ld-z80/z80.exp: Likewise. opcodes * z80-dis.c: Add support for eZ80 and Z80 instructions.
This commit is contained in:
Sergey Belyashov
committed by
Nick Clifton
Nick Clifton
parent
0db131fb83
commit
6655dba246
@ -27,41 +27,90 @@
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@section Options
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@cindex Z80 options
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@cindex options for Z80
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The Zilog Z80 and Ascii R800 version of @code{@value{AS}} have a few machine
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dependent options.
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@table @option
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@cindex @code{-z80} command-line option, Z80
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@item -z80
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Produce code for the Z80 processor. There are additional options to
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request warnings and error messages for undocumented instructions.
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@item -ignore-undocumented-instructions
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@itemx -Wnud
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Produce code for the Z80 processor. By default accepted undocumented
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operations with halves of index registers (IXL, IXH, IYL, IYH) and
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instuction IN F,(C). Other useful undocumented instructions produces
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warnings. Undocumented instructions may not work on some CPUs, use
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them on your own risk.
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@cindex @code{-r800} command-line option, R800
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@item -r800
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Produce code for the R800 processor.
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@cindex @code{-z180} command-line option, Z180
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@item -z180
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Produce code for the Z180 processor.
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@cindex @code{-ez80} command-line option, eZ80
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@item -ez80
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Produce code for the eZ80 processor in Z80 memory mode by default.
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@cindex @code{-ez80-adl} command-line option, eZ80
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@item -ez80-adl
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Produce code for the eZ80 processor in ADL memory mode by default.
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@cindex Compatibility options
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@item @code{-colonless}
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Accept colonless labels. All names at line begin are treated as labels.
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@item @code{-sdcc}
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Accept assembler code produces by SDCC.
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@cindex Undocumented instruction control
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@item @code{-strict}
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Accept documented instructions only.
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@item @code{-full}
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Accept all known Z80 instructions.
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@item @code{-with-inst=INST[,...]}
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@itemx @code{-Wnins INST[,...]}
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Enable specified undocumented instruction(s).
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@item @code{-without-inst=INST[,...]}
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@itemx @code{-Fins INST[,...]}
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Disable specified undocumented instruction(s).
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@cindex Obsolete options
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@item @code{-ignore-undocumented-instructions}
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@itemx @code{-Wnud}
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Silently assemble undocumented Z80-instructions that have been adopted
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as documented R800-instructions.
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@item -ignore-unportable-instructions
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@itemx -Wnup
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as documented R800-instructions .
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@item @code{-ignore-unportable-instructions}
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@itemx @code{-Wnup}
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Silently assemble all undocumented Z80-instructions.
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@item -warn-undocumented-instructions
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@itemx -Wud
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@item @code{-warn-undocumented-instructions}
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@itemx @code{-Wud}
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Issue warnings for undocumented Z80-instructions that work on R800, do
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not assemble other undocumented instructions without warning.
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@item -warn-unportable-instructions
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@itemx -Wup
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@item @code{-warn-unportable-instructions}
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@itemx @code{-Wup}
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Issue warnings for other undocumented Z80-instructions, do not treat any
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undocumented instructions as errors.
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@item -forbid-undocumented-instructions
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@itemx -Fud
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@item @code{-forbid-undocumented-instructions}
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@itemx @code{-Fud}
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Treat all undocumented z80-instructions as errors.
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@item -forbid-unportable-instructions
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@itemx -Fup
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@itemx @code{-Fup}
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Treat undocumented z80-instructions that do not work on R800 as errors.
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@end table
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@cindex @code{-r800} command-line option, Z80
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@item -r800
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Produce code for the R800 processor. The assembler does not support
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undocumented instructions for the R800.
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In line with common practice, @code{@value{AS}} uses Z80 instruction names
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for the R800 processor, as far as they exist.
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Known undocumented instructions.
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@table @option
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@cindex Known undocumented instructions
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@item @code{idx-reg-halves}
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All operations with halves of index registers (IXL, IXH, IYL, IYH).
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@item @code{sli}
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SLI or SLL instruction. Same as @code{SLA r; INC r}.
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@item @code{op-ii-ld}
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Istructions like @code{<op> (<ii>+<d>),<r>}. For example: @code{RL (IX+5),C}
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@item @code{in-f-c}
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Instruction @code{IN F,(C)}.
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@item @code{out-c-0}
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Instruction @code{OUT (C),0}
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@end table
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@cindex Z80 Syntax
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@ -158,6 +207,11 @@ compatibility with other assemblers.
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These are the additional directives in @code{@value{AS}} for the Z80:
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@table @code
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@item assume @var{ADL}@samp{=}@var{expression}
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Set ADL status for eZ80. Non-null value enable compilation ADL mode else
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used Z80 mode. ADL and Z80 mode produces incompatible object code. Mixing
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both of them within one binary may lead problems with disassembler.
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@item db @var{expression}|@var{string}[,@var{expression}|@var{string}...]
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@itemx defb @var{expression}|@var{string}[,@var{expression}|@var{string}...]
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For each @var{string} the characters are copied to the object file, for
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@ -192,9 +246,6 @@ These directives set the value of @var{symbol} to @var{expression}. If
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@code{equ} is used, it is an error if @var{symbol} is already defined.
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Symbols defined with @code{equ} are not protected from redefinition.
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@item set
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This is a normal instruction on Z80, and not an assembler directive.
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@item psect @var{name}
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A synonym for @xref{Section}, no second argument should be given.
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@ignore
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@ -223,18 +274,19 @@ The section is marked as read only.
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@node Z80 Opcodes
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@section Opcodes
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In line with common practice, Z80 mnemonics are used for both the Z80 and
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the R800.
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In line with common practice, Z80 mnemonics are used for the Z80,
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the Z180, eZ80 and the R800.
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In many instructions it is possible to use one of the half index
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registers (@samp{ixl},@samp{ixh},@samp{iyl},@samp{iyh}) in stead of an
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8-bit general purpose register. This yields instructions that are
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documented on the R800 and undocumented on the Z80.
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Similarly @code{in f,(c)} is documented on the R800 and undocumented on
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the Z80.
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documented on the eZ80 and the R800, undocumented on the Z80 and
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unsupported on the Z180.
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Similarly @code{in f,(c)} is documented on the R800, undocumented on
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the Z80 and unsupported on the Z180 and the eZ80.
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The assembler also supports the following undocumented Z80-instructions,
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that have not been adopted in the R800 instruction set:
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that have not been adopted in any other instruction set:
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@table @code
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@item out (c),0
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Sends zero to the port pointed to by register c.
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@ -266,3 +318,6 @@ As above, but with @samp{iy} instead of @samp{ix}.
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The web site at @uref{http://www.z80.info} is a good starting place to
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find more information on programming the Z80.
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You may enable or disable any of these instructions for any target CPU
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even this instruction is not supported by any real CPU of this type.
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Useful for custom CPU cores.
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