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[AArch64] Add ARMv8.2 instruction alias REV64.

Browse Source 
This patch adds the alias REV64 <Rd>, <Rs> as an alias for REV <Rd>,
<Rs>. However, REV is still the preferred form for the instruction.

gas/testsuite/
2015-11-27  Matthew Wahab  <matthew.wahab@arm.com>

	* gas/aarch64/alias-2.d: Add tests for REV.
	* gas/aarch64/alias-2.s: Likewise.

opcodes/
2015-11-27  Matthew Wahab  <matthew.wahab@arm.com>

	* aarch64-asm-2.c: Regenerate.
	* aarch64-dis-2.c: Regenerate.
	* aarch64-opc-2.c: Regenerate.
	* aarch64-tbl.h (aarchr64_opcode_table): Update "rev", add
	"rev64".

Change-Id: I331567c8d3618ba9fec1673c6e0b5977222dde61
This commit is contained in:
Matthew Wahab
2015-11-27 15:39:12 +00:00
parent d685192a58
commit 64357d2e04
8 changed files with 814 additions and 768 deletions
Download Patch File Download Diff File Expand all files Collapse all files

5
gas/testsuite/ChangeLog
View File

@ -1,3 +1,8 @@
2015-11-27 Matthew Wahab <matthew.wahab@arm.com>
* gas/aarch64/alias-2.d: Add tests for REV.
* gas/aarch64/alias-2.s: Likewise.
2015-11-27 Matthew Wahab <matthew.wahab@arm.com> 2015-11-27 Matthew Wahab <matthew.wahab@arm.com>
* gas/aarch64/alias-2.d: New. * gas/aarch64/alias-2.d: New.

12
gas/testsuite/gas/aarch64/alias-2.d
View File

@ -96,3 +96,15 @@ Disassembly of section \.text:
[0-9a-f]+: b3611fff bfc xzr, #31, #8 [0-9a-f]+: b3611fff bfc xzr, #31, #8
[0-9a-f]+: b3403be0 bfxil x0, xzr, #0, #15 [0-9a-f]+: b3403be0 bfxil x0, xzr, #0, #15
[0-9a-f]+: b3613bff bfc xzr, #31, #15 [0-9a-f]+: b3613bff bfc xzr, #31, #15
[0-9a-f]+: dac00fe0 rev x0, xzr
[0-9a-f]+: dac00c20 rev x0, x1
[0-9a-f]+: dac00c3f rev xzr, x1
[0-9a-f]+: dac00fff rev xzr, xzr
[0-9a-f]+: dac007e0 rev16 x0, xzr
[0-9a-f]+: dac00420 rev16 x0, x1
[0-9a-f]+: dac0043f rev16 xzr, x1
[0-9a-f]+: dac007ff rev16 xzr, xzr
[0-9a-f]+: dac00fe0 rev x0, xzr
[0-9a-f]+: dac00c20 rev x0, x1
[0-9a-f]+: dac00c3f rev xzr, x1
[0-9a-f]+: dac00fff rev xzr, xzr

12
gas/testsuite/gas/aarch64/alias-2.s
View File

@ -15,6 +15,14 @@
bfc xzr, #\imm, #\width bfc xzr, #\imm, #\width
.endm .endm
/* <rev> [Xd|xzr], [Xr|xzr] */
.macro rev_inst op
\op x0, xzr
\op x0, x1
\op xzr, x1
\op xzr, xzr
.endm
.text .text
.irp op, bfm, bfi .irp op, bfm, bfi
.irp imm, 1, 16, 31 .irp imm, 1, 16, 31
@ -29,3 +37,7 @@
bfc_inst \imm, \width bfc_inst \imm, \width
.endr .endr
.endr .endr
.irp op, rev, rev16, rev64
rev_inst \op
.endr

8
opcodes/ChangeLog
View File

@ -1,3 +1,11 @@
2015-11-27 Matthew Wahab <matthew.wahab@arm.com>
* aarch64-asm-2.c: Regenerate.
* aarch64-dis-2.c: Regenerate.
* aarch64-opc-2.c: Regenerate.
* aarch64-tbl.h (aarchr64_opcode_table): Update "rev", add
"rev64".
2015-11-27 Matthew Wahab <matthew.wahab@arm.com> 2015-11-27 Matthew Wahab <matthew.wahab@arm.com>
* aarch64-asm-2.c: Regenerate. * aarch64-asm-2.c: Regenerate.

514
opcodes/aarch64-asm-2.c
View File

@ -149,290 +149,294 @@ aarch64_find_real_opcode (const aarch64_opcode *opcode)
case 540: /* csneg */ case 540: /* csneg */
value = 540; /* --> csneg. */ value = 540; /* --> csneg. */
break; break;
case 566: /* lsl */ case 559: /* rev */
case 565: /* lslv */ case 560: /* rev64 */
value = 565; /* --> lslv. */ value = 559; /* --> rev. */
break; break;
case 568: /* lsr */ case 567: /* lsl */
case 567: /* lsrv */ case 566: /* lslv */
value = 567; /* --> lsrv. */ value = 566; /* --> lslv. */
break; break;
case 570: /* asr */ case 569: /* lsr */
case 569: /* asrv */ case 568: /* lsrv */
value = 569; /* --> asrv. */ value = 568; /* --> lsrv. */
break; break;
case 572: /* ror */ case 571: /* asr */
case 571: /* rorv */ case 570: /* asrv */
value = 571; /* --> rorv. */ value = 570; /* --> asrv. */
break; break;
case 582: /* mul */ case 573: /* ror */
case 581: /* madd */ case 572: /* rorv */
value = 581; /* --> madd. */ value = 572; /* --> rorv. */
break; break;
case 584: /* mneg */ case 583: /* mul */
case 583: /* msub */ case 582: /* madd */
value = 583; /* --> msub. */ value = 582; /* --> madd. */
break; break;
case 586: /* smull */ case 585: /* mneg */
case 585: /* smaddl */ case 584: /* msub */
value = 585; /* --> smaddl. */ value = 584; /* --> msub. */
break; break;
case 588: /* smnegl */ case 587: /* smull */
case 587: /* smsubl */ case 586: /* smaddl */
value = 587; /* --> smsubl. */ value = 586; /* --> smaddl. */
break; break;
case 591: /* umull */ case 589: /* smnegl */
case 590: /* umaddl */ case 588: /* smsubl */
value = 590; /* --> umaddl. */ value = 588; /* --> smsubl. */
break; break;
case 593: /* umnegl */ case 592: /* umull */
case 592: /* umsubl */ case 591: /* umaddl */
value = 592; /* --> umsubl. */ value = 591; /* --> umaddl. */
break; break;
case 604: /* ror */ case 594: /* umnegl */
case 603: /* extr */ case 593: /* umsubl */
value = 603; /* --> extr. */ value = 593; /* --> umsubl. */
break; break;
case 761: /* bic */ case 605: /* ror */
case 760: /* and */ case 604: /* extr */
value = 760; /* --> and. */ value = 604; /* --> extr. */
break; break;
case 763: /* mov */ case 762: /* bic */
case 762: /* orr */ case 761: /* and */
value = 762; /* --> orr. */ value = 761; /* --> and. */
break; break;
case 766: /* tst */ case 764: /* mov */
case 765: /* ands */ case 763: /* orr */
value = 765; /* --> ands. */ value = 763; /* --> orr. */
break; break;
case 771: /* uxtw */ case 767: /* tst */
case 770: /* mov */ case 766: /* ands */
case 769: /* orr */ value = 766; /* --> ands. */
value = 769; /* --> orr. */ break;
case 772: /* uxtw */
case 771: /* mov */
case 770: /* orr */
value = 770; /* --> orr. */
break; break;
case 773: /* mvn */ case 774: /* mvn */
case 772: /* orn */ case 773: /* orn */
value = 772; /* --> orn. */ value = 773; /* --> orn. */
break; break;
case 777: /* tst */ case 778: /* tst */
case 776: /* ands */ case 777: /* ands */
value = 776; /* --> ands. */ value = 777; /* --> ands. */
break; break;
case 903: /* staddb */ case 904: /* staddb */
case 807: /* ldaddb */ case 808: /* ldaddb */
value = 807; /* --> ldaddb. */ value = 808; /* --> ldaddb. */
break; break;
case 904: /* staddh */ case 905: /* staddh */
case 808: /* ldaddh */ case 809: /* ldaddh */
value = 808; /* --> ldaddh. */ value = 809; /* --> ldaddh. */
break; break;
case 905: /* stadd */ case 906: /* stadd */
case 809: /* ldadd */ case 810: /* ldadd */
value = 809; /* --> ldadd. */ value = 810; /* --> ldadd. */
break; break;
case 906: /* staddlb */ case 907: /* staddlb */
case 811: /* ldaddlb */ case 812: /* ldaddlb */
value = 811; /* --> ldaddlb. */ value = 812; /* --> ldaddlb. */
break; break;
case 907: /* staddlh */ case 908: /* staddlh */
case 814: /* ldaddlh */ case 815: /* ldaddlh */
value = 814; /* --> ldaddlh. */ value = 815; /* --> ldaddlh. */
break; break;
case 908: /* staddl */ case 909: /* staddl */
case 817: /* ldaddl */ case 818: /* ldaddl */
value = 817; /* --> ldaddl. */ value = 818; /* --> ldaddl. */
break; break;
case 909: /* stclrb */ case 910: /* stclrb */
case 819: /* ldclrb */ case 820: /* ldclrb */
value = 819; /* --> ldclrb. */ value = 820; /* --> ldclrb. */
break; break;
case 910: /* stclrh */ case 911: /* stclrh */
case 820: /* ldclrh */ case 821: /* ldclrh */
value = 820; /* --> ldclrh. */ value = 821; /* --> ldclrh. */
break; break;
case 911: /* stclr */ case 912: /* stclr */
case 821: /* ldclr */ case 822: /* ldclr */
value = 821; /* --> ldclr. */ value = 822; /* --> ldclr. */
break; break;
case 912: /* stclrlb */ case 913: /* stclrlb */
case 823: /* ldclrlb */ case 824: /* ldclrlb */
value = 823; /* --> ldclrlb. */ value = 824; /* --> ldclrlb. */
break; break;
case 913: /* stclrlh */ case 914: /* stclrlh */
case 826: /* ldclrlh */ case 827: /* ldclrlh */
value = 826; /* --> ldclrlh. */ value = 827; /* --> ldclrlh. */
break; break;
case 914: /* stclrl */ case 915: /* stclrl */
case 829: /* ldclrl */ case 830: /* ldclrl */
value = 829; /* --> ldclrl. */ value = 830; /* --> ldclrl. */
break; break;
case 915: /* steorb */ case 916: /* steorb */
case 831: /* ldeorb */ case 832: /* ldeorb */
value = 831; /* --> ldeorb. */ value = 832; /* --> ldeorb. */
break; break;
case 916: /* steorh */ case 917: /* steorh */
case 832: /* ldeorh */ case 833: /* ldeorh */
value = 832; /* --> ldeorh. */ value = 833; /* --> ldeorh. */
break; break;
case 917: /* steor */ case 918: /* steor */
case 833: /* ldeor */ case 834: /* ldeor */
value = 833; /* --> ldeor. */ value = 834; /* --> ldeor. */
break; break;
case 918: /* steorlb */ case 919: /* steorlb */
case 835: /* ldeorlb */ case 836: /* ldeorlb */
value = 835; /* --> ldeorlb. */ value = 836; /* --> ldeorlb. */
break; break;
case 919: /* steorlh */ case 920: /* steorlh */
case 838: /* ldeorlh */ case 839: /* ldeorlh */
value = 838; /* --> ldeorlh. */ value = 839; /* --> ldeorlh. */
break; break;
case 920: /* steorl */ case 921: /* steorl */
case 841: /* ldeorl */ case 842: /* ldeorl */
value = 841; /* --> ldeorl. */ value = 842; /* --> ldeorl. */
break; break;
case 921: /* stsetb */ case 922: /* stsetb */
case 843: /* ldsetb */ case 844: /* ldsetb */
value = 843; /* --> ldsetb. */ value = 844; /* --> ldsetb. */
break; break;
case 922: /* stseth */ case 923: /* stseth */
case 844: /* ldseth */ case 845: /* ldseth */
value = 844; /* --> ldseth. */ value = 845; /* --> ldseth. */
break; break;
case 923: /* stset */ case 924: /* stset */
case 845: /* ldset */ case 846: /* ldset */
value = 845; /* --> ldset. */ value = 846; /* --> ldset. */
break; break;
case 924: /* stsetlb */ case 925: /* stsetlb */
case 847: /* ldsetlb */ case 848: /* ldsetlb */
value = 847; /* --> ldsetlb. */ value = 848; /* --> ldsetlb. */
break; break;
case 925: /* stsetlh */ case 926: /* stsetlh */
case 850: /* ldsetlh */ case 851: /* ldsetlh */
value = 850; /* --> ldsetlh. */ value = 851; /* --> ldsetlh. */
break; break;
case 926: /* stsetl */ case 927: /* stsetl */
case 853: /* ldsetl */ case 854: /* ldsetl */
value = 853; /* --> ldsetl. */ value = 854; /* --> ldsetl. */
break; break;
case 927: /* stsmaxb */ case 928: /* stsmaxb */
case 855: /* ldsmaxb */ case 856: /* ldsmaxb */
value = 855; /* --> ldsmaxb. */ value = 856; /* --> ldsmaxb. */
break; break;
case 928: /* stsmaxh */ case 929: /* stsmaxh */
case 856: /* ldsmaxh */ case 857: /* ldsmaxh */
value = 856; /* --> ldsmaxh. */ value = 857; /* --> ldsmaxh. */
break; break;
case 929: /* stsmax */ case 930: /* stsmax */
case 857: /* ldsmax */ case 858: /* ldsmax */
value = 857; /* --> ldsmax. */ value = 858; /* --> ldsmax. */
break; break;
case 930: /* stsmaxlb */ case 931: /* stsmaxlb */
case 859: /* ldsmaxlb */ case 860: /* ldsmaxlb */
value = 859; /* --> ldsmaxlb. */ value = 860; /* --> ldsmaxlb. */
break; break;
case 931: /* stsmaxlh */ case 932: /* stsmaxlh */
case 862: /* ldsmaxlh */ case 863: /* ldsmaxlh */
value = 862; /* --> ldsmaxlh. */ value = 863; /* --> ldsmaxlh. */
break; break;
case 932: /* stsmaxl */ case 933: /* stsmaxl */
case 865: /* ldsmaxl */ case 866: /* ldsmaxl */
value = 865; /* --> ldsmaxl. */ value = 866; /* --> ldsmaxl. */
break; break;
case 933: /* stsminb */ case 934: /* stsminb */
case 867: /* ldsminb */ case 868: /* ldsminb */
value = 867; /* --> ldsminb. */ value = 868; /* --> ldsminb. */
break; break;
case 934: /* stsminh */ case 935: /* stsminh */
case 868: /* ldsminh */ case 869: /* ldsminh */
value = 868; /* --> ldsminh. */ value = 869; /* --> ldsminh. */
break; break;
case 935: /* stsmin */ case 936: /* stsmin */
case 869: /* ldsmin */ case 870: /* ldsmin */
value = 869; /* --> ldsmin. */ value = 870; /* --> ldsmin. */
break; break;
case 936: /* stsminlb */ case 937: /* stsminlb */
case 871: /* ldsminlb */ case 872: /* ldsminlb */
value = 871; /* --> ldsminlb. */ value = 872; /* --> ldsminlb. */
break; break;
case 937: /* stsminlh */ case 938: /* stsminlh */
case 874: /* ldsminlh */ case 875: /* ldsminlh */
value = 874; /* --> ldsminlh. */ value = 875; /* --> ldsminlh. */
break; break;
case 938: /* stsminl */ case 939: /* stsminl */
case 877: /* ldsminl */ case 878: /* ldsminl */
value = 877; /* --> ldsminl. */ value = 878; /* --> ldsminl. */
break; break;
case 939: /* stumaxb */ case 940: /* stumaxb */
case 879: /* ldumaxb */ case 880: /* ldumaxb */
value = 879; /* --> ldumaxb. */ value = 880; /* --> ldumaxb. */
break; break;
case 940: /* stumaxh */ case 941: /* stumaxh */
case 880: /* ldumaxh */ case 881: /* ldumaxh */
value = 880; /* --> ldumaxh. */ value = 881; /* --> ldumaxh. */
break; break;
case 941: /* stumax */ case 942: /* stumax */
case 881: /* ldumax */ case 882: /* ldumax */
value = 881; /* --> ldumax. */ value = 882; /* --> ldumax. */
break; break;
case 942: /* stumaxlb */ case 943: /* stumaxlb */
case 883: /* ldumaxlb */ case 884: /* ldumaxlb */
value = 883; /* --> ldumaxlb. */ value = 884; /* --> ldumaxlb. */
break; break;
case 943: /* stumaxlh */ case 944: /* stumaxlh */
case 886: /* ldumaxlh */ case 887: /* ldumaxlh */
value = 886; /* --> ldumaxlh. */ value = 887; /* --> ldumaxlh. */
break; break;
case 944: /* stumaxl */ case 945: /* stumaxl */
case 889: /* ldumaxl */ case 890: /* ldumaxl */
value = 889; /* --> ldumaxl. */ value = 890; /* --> ldumaxl. */
break; break;
case 945: /* stuminb */ case 946: /* stuminb */
case 891: /* lduminb */ case 892: /* lduminb */
value = 891; /* --> lduminb. */ value = 892; /* --> lduminb. */
break; break;
case 946: /* stuminh */ case 947: /* stuminh */
case 892: /* lduminh */ case 893: /* lduminh */
value = 892; /* --> lduminh. */ value = 893; /* --> lduminh. */
break; break;
case 947: /* stumin */ case 948: /* stumin */
case 893: /* ldumin */ case 894: /* ldumin */
value = 893; /* --> ldumin. */ value = 894; /* --> ldumin. */
break; break;
case 948: /* stuminlb */ case 949: /* stuminlb */
case 895: /* lduminlb */ case 896: /* lduminlb */
value = 895; /* --> lduminlb. */ value = 896; /* --> lduminlb. */
break; break;
case 949: /* stuminlh */ case 950: /* stuminlh */
case 898: /* lduminlh */ case 899: /* lduminlh */
value = 898; /* --> lduminlh. */ value = 899; /* --> lduminlh. */
break; break;
case 950: /* stuminl */ case 951: /* stuminl */
case 901: /* lduminl */ case 902: /* lduminl */
value = 901; /* --> lduminl. */ value = 902; /* --> lduminl. */
break; break;
case 952: /* mov */ case 953: /* mov */
case 951: /* movn */ case 952: /* movn */
value = 951; /* --> movn. */ value = 952; /* --> movn. */
break; break;
case 954: /* mov */ case 955: /* mov */
case 953: /* movz */ case 954: /* movz */
value = 953; /* --> movz. */ value = 954; /* --> movz. */
break; break;
case 965: /* sevl */ case 966: /* sevl */
case 964: /* sev */ case 965: /* sev */
case 963: /* wfi */ case 964: /* wfi */
case 962: /* wfe */ case 963: /* wfe */
case 961: /* yield */ case 962: /* yield */
case 960: /* nop */ case 961: /* nop */
case 959: /* hint */ case 960: /* hint */
value = 959; /* --> hint. */ value = 960; /* --> hint. */
break; break;
case 974: /* tlbi */ case 975: /* tlbi */
case 973: /* ic */ case 974: /* ic */
case 972: /* dc */ case 973: /* dc */
case 971: /* at */ case 972: /* at */
case 970: /* sys */ case 971: /* sys */
value = 970; /* --> sys. */ value = 971; /* --> sys. */
break; break;
default: return NULL; default: return NULL;
} }

990
opcodes/aarch64-dis-2.c
View File

File diff suppressed because it is too large Load Diff

36
opcodes/aarch64-opc-2.c
View File

@ -121,48 +121,48 @@ const struct aarch64_operand aarch64_operands[] =
static const unsigned op_enum_table [] = static const unsigned op_enum_table [] =
{ {
0, 0,
669,
670, 670,
671, 671,
674, 672,
675, 675,
676, 676,
677, 677,
678, 678,
672,
673,
679, 679,
673,
674,
680, 680,
702, 681,
703, 703,
704, 704,
707, 705,
708, 708,
709, 709,
710, 710,
711, 711,
705,
706,
712, 712,
706,
707,
713, 713,
756, 714,
757, 757,
758, 758,
759, 759,
760,
12, 12,
519, 519,
520, 520,
951,
953,
955,
763,
954,
952, 952,
954,
956,
764,
955,
953,
261, 261,
507, 507,
518, 518,
517, 517,
761, 762,
514, 514,
511, 511,
503, 503,
@ -172,19 +172,19 @@ static const unsigned op_enum_table [] =
513, 513,
515, 515,
516, 516,
771, 772,
535, 535,
538, 538,
541, 541,
536, 536,
539, 539,
635, 636,
162, 162,
163, 163,
164, 164,
165, 165,
426, 426,
604, 605,
318, 318,
320, 320,
340, 340,

5
opcodes/aarch64-tbl.h
View File

@ -1848,7 +1848,10 @@ struct aarch64_opcode aarch64_opcode_table[] =
{"rbit", 0x5ac00000, 0x7ffffc00, dp_1src, 0, CORE, OP2 (Rd, Rn), QL_I2SAME, F_SF}, {"rbit", 0x5ac00000, 0x7ffffc00, dp_1src, 0, CORE, OP2 (Rd, Rn), QL_I2SAME, F_SF},
{"rev16", 0x5ac00400, 0x7ffffc00, dp_1src, 0, CORE, OP2 (Rd, Rn), QL_I2SAME, F_SF}, {"rev16", 0x5ac00400, 0x7ffffc00, dp_1src, 0, CORE, OP2 (Rd, Rn), QL_I2SAME, F_SF},
{"rev", 0x5ac00800, 0xfffffc00, dp_1src, 0, CORE, OP2 (Rd, Rn), QL_I2SAMEW, 0}, {"rev", 0x5ac00800, 0xfffffc00, dp_1src, 0, CORE, OP2 (Rd, Rn), QL_I2SAMEW, 0},
{"rev", 0xdac00c00, 0x7ffffc00, dp_1src, 0, CORE, OP2 (Rd, Rn), QL_I2SAMEX, 0}, {"rev", 0xdac00c00, 0xfffffc00, dp_1src, 0, CORE,
OP2 (Rd, Rn), QL_I2SAMEX, F_SF | F_HAS_ALIAS | F_P1},
{"rev64", 0xdac00c00, 0xfffffc00, dp_1src, 0, ARMV8_2,
OP2 (Rd, Rn), QL_I2SAMEX, F_SF | F_ALIAS},
{"clz", 0x5ac01000, 0x7ffffc00, dp_1src, 0, CORE, OP2 (Rd, Rn), QL_I2SAME, F_SF}, {"clz", 0x5ac01000, 0x7ffffc00, dp_1src, 0, CORE, OP2 (Rd, Rn), QL_I2SAME, F_SF},
{"cls", 0x5ac01400, 0x7ffffc00, dp_1src, 0, CORE, OP2 (Rd, Rn), QL_I2SAME, F_SF}, {"cls", 0x5ac01400, 0x7ffffc00, dp_1src, 0, CORE, OP2 (Rd, Rn), QL_I2SAME, F_SF},
{"rev32", 0xdac00800, 0xfffffc00, dp_1src, 0, CORE, OP2 (Rd, Rn), QL_I2SAMEX, 0}, {"rev32", 0xdac00800, 0xfffffc00, dp_1src, 0, CORE, OP2 (Rd, Rn), QL_I2SAMEX, 0},