espressif/binutils-gdb
1
0
Fork 0
mirror of https://github.com/espressif/binutils-gdb.git synced 2025-08-06 14:49:38 +08:00
Code Issues Packages Projects Releases Wiki Activity

[gas/]

Browse Source 
* doc/c-mips.texi: Add entries for -march=vr4120,vr4130,vr4181,
	vr5400 and vr5500.  Add entry for -mfix-vr4122-bugs.
	* config/tc-mips.c (CPU_HAS_DROR, CPU_HAS_ROR): New macros.
	(hilo_interlocks): True for CPU_VR5500.
	(gpr_interlocks, cop_interlocks): True for CPU_VR5400 and CPU_VR5500.
	(mips_fix_vr4122_bugs): New.
	(append_insn): Work around 4122 errors if mips_fix_vr4122_bugs.
	(mips_emit_delays): Likewise.
	(macro2) [M_DROLI]: Use dror or dror32 if CPU_HAS_DROR.
	[M_ROLI]: Likewise ror if CPU_HAS_ROR.
	(validate_mips_insn, mips_ip): Handle '[', ']', 'e' and '%'.
	(OPTION_FIX_VR4122, OPTION_NO_FIX_VR4122): New options.
	(md_longopts): Add -mfix-vr4122-bugs and -no-mfix-vr4122-bugs.
	(OPTION_ELF_BASE): Bump.
	(md_parse_option): Handle the new options.
	(mips_cpu_info_table): Add entries for vr4120, vr4130, vr4181,
	vr5400 and vr5500.

[gas/testsuite/]
	* gas/mips/mips4100.[sd]: Move dmadd16 and madd16 checks to...
	* gas/mips/vr4111.[sd]: ...this new test.
	* gas/mips/vr4120.[sd],
	* gas/mips/vr4122.[sd],
	* gas/mips/vr5400.[sd],
	* gas/mips/vr5500.[sd]: New tests.
	* mips.exp: Run them.
This commit is contained in:
Richard Sandiford
2002-09-30 12:04:54 +00:00
parent 9752cf1b67
commit 60b63b728f
17 changed files with 789 additions and 10 deletions
Download Patch File Download Diff File Expand all files Collapse all files

11
gas/doc/c-mips.texi
View File

@ -116,6 +116,12 @@ This tells the assembler to accept MDMX instructions.
Cause nops to be inserted if the read of the destination register
of an mfhi or mflo instruction occurs in the following two instructions.
@item -mfix-vr4122-bugs
@itemx -no-mfix-vr4122-bugs
Insert @samp{nop} instructions to avoid errors in certain versions of
the vr4122 core. This option is intended to be used on GCC-generated
code: it is not designed to catch errors in hand-written assembler code.
@item -m4010
@itemx -no-m4010
Generate code for the LSI @sc{r4010} chip. This tells the assembler to
@ -152,6 +158,9 @@ understood. Valid @var{cpu} value are:
4010,
4100,
4111,
vr4120,
vr4130,
vr4181,
4300,
4400,
4600,
@ -162,6 +171,8 @@ rm5230,
rm5231,
rm5261,
rm5721,
vr5400,
vr5500,
6000,
rm7000,
8000,