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https://github.com/espressif/binutils-gdb.git
synced 2025-06-24 12:23:31 +08:00
Allow spaces in i386 FP reg names, eg. %st ( 1 ).
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@ -1,3 +1,9 @@
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1999-08-29 Alan Modra <alan@spri.levels.unisa.edu.au>
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Based on a patch from H.J. Lu <hjl@gnu.org>
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* config/tc-i386.c (parse_register): Handle FP regs specially.
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(md_begin): Remove '(' and ')' from register_chars.
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1999-08-29 Doug Evans <devans@casey.cygnus.com>
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1999-08-29 Doug Evans <devans@casey.cygnus.com>
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* config/tc-m32r.c (md_parse_option): Delete unrecognized option
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* config/tc-m32r.c (md_parse_option): Delete unrecognized option
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@ -703,8 +703,6 @@ md_begin ()
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#ifdef LEX_AT
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#ifdef LEX_AT
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identifier_chars['@'] = '@';
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identifier_chars['@'] = '@';
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#endif
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#endif
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register_chars[')'] = ')';
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register_chars['('] = '(';
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digit_chars['-'] = '-';
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digit_chars['-'] = '-';
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identifier_chars['_'] = '_';
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identifier_chars['_'] = '_';
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identifier_chars['.'] = '.';
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identifier_chars['.'] = '.';
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@ -4166,6 +4164,39 @@ parse_register (reg_string, end_op)
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r = (const reg_entry *) hash_find (reg_hash, reg_name_given);
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r = (const reg_entry *) hash_find (reg_hash, reg_name_given);
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/* Handle floating point regs, allowing spaces in the (i) part. */
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if (r == i386_regtab /* %st is first entry of table */)
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{
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--s;
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if (is_space_char (*s))
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++s;
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if (*s == '(')
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{
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*p++ = *s++;
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if (is_space_char (*s))
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++s;
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if (*s >= '0' && *s <= '7')
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{
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r = &i386_float_regtab[*s - '0'];
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*p++ = *s++;
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if (is_space_char (*s))
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++s;
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if (*s == ')')
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{
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*end_op = s + 1;
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return r;
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}
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*p++ = *s;
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}
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if (!allow_naked_reg)
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{
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*p = '\0';
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as_bad (_("bad register name `%s'"), reg_name_given);
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}
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return (const reg_entry *) NULL;
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}
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}
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if (r == NULL)
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if (r == NULL)
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{
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{
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if (!allow_naked_reg)
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if (!allow_naked_reg)
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@ -1,3 +1,7 @@
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1999-08-29 Alan Modra <alan@spri.levels.unisa.edu.au>
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* gas/i386/white.s, gas/i386/white.l: Add space in FP reg tests.
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Sat Aug 28 00:16:12 1999 Jerry Quinn <jquinn@nortelnetworks.com>
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Sat Aug 28 00:16:12 1999 Jerry Quinn <jquinn@nortelnetworks.com>
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* gas/hppa/basic/basic.exp: Add new tests shift2.s,
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* gas/hppa/basic/basic.exp: Add new tests shift2.s,
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@ -19,3 +19,6 @@ GAS LISTING .*
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16 0022 66B81300 0000 Mov \$ foo , %eAx
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16 0022 66B81300 0000 Mov \$ foo , %eAx
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17 .Code32
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17 .Code32
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18 0028 66B81300 mov \$ foo , %ax
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18 0028 66B81300 mov \$ foo , %ax
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19
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20 002c D9C9 fxch %st \( 1 \)
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21 002e D9C9 fxch % st\(1\)
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@ -16,3 +16,6 @@ foo: jmpw % es : * ( % ebx )
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Mov $ foo , %eAx
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Mov $ foo , %eAx
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.Code32
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.Code32
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mov $ foo , %ax
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mov $ foo , %ax
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fxch %st ( 1 )
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fxch % st(1)
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@ -1,3 +1,9 @@
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1999-08-29 Alan Modra <alan@spri.levels.unisa.edu.au>
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* i386.h (i386_regtab): Move %st to top of table, and split off
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other fp reg entries.
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(i386_float_regtab): To here.
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Sat Aug 28 00:25:25 1999 Jerry Quinn <jquinn@nortelnetworks.com>
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Sat Aug 28 00:25:25 1999 Jerry Quinn <jquinn@nortelnetworks.com>
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* hppa.h (pa_opcodes): Replace 'f' by 'v'. Prefix float register args
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* hppa.h (pa_opcodes): Replace 'f' by 'v'. Prefix float register args
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@ -1061,6 +1061,8 @@ static const template i386_optab[] = {
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/* 386 register table */
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/* 386 register table */
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static const reg_entry i386_regtab[] = {
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static const reg_entry i386_regtab[] = {
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/* make %st first as we test for it */
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{"st", FloatReg|FloatAcc, 0},
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/* 8 bit regs */
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/* 8 bit regs */
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{"al", Reg8|Acc, 0},
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{"al", Reg8|Acc, 0},
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{"cl", Reg8|ShiftCount, 1},
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{"cl", Reg8|ShiftCount, 1},
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@ -1130,16 +1132,7 @@ static const reg_entry i386_regtab[] = {
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{"tr5", Test, 5},
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{"tr5", Test, 5},
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{"tr6", Test, 6},
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{"tr6", Test, 6},
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{"tr7", Test, 7},
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{"tr7", Test, 7},
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/* float registers */
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/* mmx and simd registers */
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{"st(0)", FloatReg|FloatAcc, 0},
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{"st", FloatReg|FloatAcc, 0},
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{"st(1)", FloatReg, 1},
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{"st(2)", FloatReg, 2},
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{"st(3)", FloatReg, 3},
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{"st(4)", FloatReg, 4},
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{"st(5)", FloatReg, 5},
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{"st(6)", FloatReg, 6},
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{"st(7)", FloatReg, 7},
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{"mm0", RegMMX, 0},
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{"mm0", RegMMX, 0},
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{"mm1", RegMMX, 1},
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{"mm1", RegMMX, 1},
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{"mm2", RegMMX, 2},
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{"mm2", RegMMX, 2},
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@ -1158,6 +1151,17 @@ static const reg_entry i386_regtab[] = {
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{"xmm7", RegXMM, 7}
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{"xmm7", RegXMM, 7}
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};
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};
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static const reg_entry i386_float_regtab[] = {
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{"st(0)", FloatReg|FloatAcc, 0},
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{"st(1)", FloatReg, 1},
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{"st(2)", FloatReg, 2},
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{"st(3)", FloatReg, 3},
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{"st(4)", FloatReg, 4},
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{"st(5)", FloatReg, 5},
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{"st(6)", FloatReg, 6},
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{"st(7)", FloatReg, 7}
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};
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#define MAX_REG_NAME_SIZE 8 /* for parsing register names from input */
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#define MAX_REG_NAME_SIZE 8 /* for parsing register names from input */
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/* segment stuff */
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/* segment stuff */
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