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x86/Intel: improve diagnostics

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The diagnostics issued by check_*_reg() are pretty AT&T-centric. Re-use
logic already used for SIMD memory operand size checking also for ones
where GPRs would alternatively also be allowed. (There's certainly room
for further improvement here.)
This commit is contained in:
Jan Beulich
2020-02-12 10:58:42 +01:00
parent f056b22b92
commit 5de4d9ef71
2 changed files with 11 additions and 4 deletions
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6
gas/ChangeLog
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@ -1,3 +1,9 @@
2020-02-12 Jan Beulich <jbeulich@suse.com>
* config/tc-i386.c (operand_type_register_match): Also fall
through initial two if()-s when the template allows for a GPR
operand. Adjust comment.
2020-02-11 Jan Beulich <jbeulich@suse.com>
(struct _i386_insn): New field "short_form".

9
gas/config/tc-i386.c
View File

@ -2248,8 +2248,7 @@ mismatch:
/* If given types g0 and g1 are registers they must be of the same type
unless the expected operand type register overlap is null.
Memory operand size of certain SIMD instructions is also being checked
here. */
Some Intel syntax memory operand size checking also happens here. */
static INLINE int
operand_type_register_match (i386_operand_type g0,
@ -2261,14 +2260,16 @@ operand_type_register_match (i386_operand_type g0,
&& g0.bitfield.class != RegSIMD
&& (!operand_type_check (g0, anymem)
|| g0.bitfield.unspecified
|| t0.bitfield.class != RegSIMD))
|| (t0.bitfield.class != Reg
&& t0.bitfield.class != RegSIMD)))
return 1;
if (g1.bitfield.class != Reg
&& g1.bitfield.class != RegSIMD
&& (!operand_type_check (g1, anymem)
|| g1.bitfield.unspecified
|| t1.bitfield.class != RegSIMD))
|| (t1.bitfield.class != Reg
&& t1.bitfield.class != RegSIMD)))
return 1;
if (g0.bitfield.byte == g1.bitfield.byte