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* config/tc-sh.c (get_specific): Revert 2002-05-01 change.

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(assemble_ppi): Generate warning if the same register is used
	twice as destination in the same padd / pmuls instruction.
This commit is contained in:
Joern Rennecke
2002-06-19 14:28:09 +00:00
parent cc36acdfd5
commit 5db33d76e1
2 changed files with 15 additions and 21 deletions
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6
gas/ChangeLog
View File

@ -1,3 +1,9 @@
Wed Jun 19 15:12:00 2002 Dhananjay R. Deshpande <dhananjayd@kpit.com>
* config/tc-sh.c (get_specific): Revert 2002-05-01 change.
(assemble_ppi): Generate warning if the same register is used
twice as destination in the same padd / pmuls instruction.
2002-06-18 Dave Brolley <brolley@redhat.com> 2002-06-18 Dave Brolley <brolley@redhat.com>
From Catherine Moore, Michael Meissner, Richard Sandiford, Dave Brolley: From Catherine Moore, Michael Meissner, Richard Sandiford, Dave Brolley:

30
gas/config/tc-sh.c
View File

@ -1589,27 +1589,6 @@ get_specific (opcode, operands)
sh_operand_info *user = operands + n; sh_operand_info *user = operands + n;
sh_arg_type arg = this_try->arg[n]; sh_arg_type arg = this_try->arg[n];
/* If this is a parallel insn check to see if both
parts have the same destination register. */
if ((n == 2) && (this_try->nibbles[0] == PPI))
{
static boolean bIsPPI = false;
static int nLastDestReg;
if (!bIsPPI)
{
bIsPPI = true;
nLastDestReg = user->reg;
}
else /* Second insn. */
{
if (nLastDestReg == user->reg)
as_warn (_("destination register is same for parallel insns"));
bIsPPI = false;
}
}
switch (arg) switch (arg)
{ {
case A_DISP_PC: case A_DISP_PC:
@ -2280,6 +2259,15 @@ assemble_ppi (op_end, opcode)
default: default:
as_bad (_("bad padd / psub pmuls output operand")); as_bad (_("bad padd / psub pmuls output operand"));
} }
/* Generate waring if destination register for padd / psub
and pmuls is same ( only for A0 or A1 )
If last nibble is 1010 then A0 is used in both padd / psub
and pmuls. If it is 1111 then A1 is used as destination
register in both padd / psub and pmuls */
if ((((field_b | reg_efg) & 0x000F) == 0x000A)
|| (((field_b | reg_efg) & 0x000F) == 0x000F))
as_warn (_("destination register is same for parallel insns"));
} }
field_b += 0x4000 + reg_efg; field_b += 0x4000 + reg_efg;
break; break;