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x86: drop use of XOP2SOURCES
The few XOP insns which used it wrongly didn't have VexVVVV specified. With that added, the only further missing piece to use more generic code elsewhere is SwapSources - see e.g. the BMI2 insns for similar operand patterns. With the only users gone, drop the #define as well as the special case code.
This commit is contained in:
@ -2142,9 +2142,9 @@ operand_size_match (const insn_template *t)
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{
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{
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unsigned int given = i.operands - j - 1;
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unsigned int given = i.operands - j - 1;
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/* For 4- and 5-operand insns VEX.W controls just the first two
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/* For 4-operand and XOP insns VEX.W controls just the first two
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register operands. */
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register operands. */
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if (t->opcode_modifier.vexsources)
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if (t->opcode_modifier.vexsources || t->cpu_flags.bitfield.cpuxop)
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given = j < 2 ? 1 - j : j;
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given = j < 2 ? 1 - j : j;
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if (t->operand_types[j].bitfield.class == Reg
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if (t->operand_types[j].bitfield.class == Reg
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@ -6933,7 +6933,8 @@ match_template (char mnem_suffix)
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if (!(size_match & MATCH_REVERSE))
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if (!(size_match & MATCH_REVERSE))
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continue;
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continue;
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/* Try reversing direction of operands. */
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/* Try reversing direction of operands. */
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j = t->opcode_modifier.vexsources ? 1 : i.operands - 1;
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j = t->opcode_modifier.vexsources
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|| t->cpu_flags.bitfield.cpuxop ? 1 : i.operands - 1;
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overlap0 = operand_type_and (i.types[0], operand_types[j]);
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overlap0 = operand_type_and (i.types[0], operand_types[j]);
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overlap1 = operand_type_and (i.types[j], operand_types[0]);
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overlap1 = operand_type_and (i.types[j], operand_types[0]);
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overlap2 = operand_type_and (i.types[1], operand_types[1]);
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overlap2 = operand_type_and (i.types[1], operand_types[1]);
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@ -6967,7 +6968,8 @@ match_template (char mnem_suffix)
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&& (intel_syntax || intel_mnemonic))
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&& (intel_syntax || intel_mnemonic))
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found_reverse_match |= Opcode_FloatR;
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found_reverse_match |= Opcode_FloatR;
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}
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}
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else if (t->opcode_modifier.vexsources)
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else if (t->opcode_modifier.vexsources
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|| t->cpu_flags.bitfield.cpuxop)
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{
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{
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found_reverse_match = Opcode_VexW;
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found_reverse_match = Opcode_VexW;
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goto check_operands_345;
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goto check_operands_345;
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@ -8618,35 +8620,7 @@ build_modrm_byte (void)
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else
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else
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mem = ~0;
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mem = ~0;
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if (i.tm.opcode_modifier.vexsources == XOP2SOURCES)
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if (i.tm.opcode_modifier.vexvvvv == VEXLWP)
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{
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/* VEX.vvvv encodes one of the sources. */
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if (i.tm.opcode_modifier.vexw == VEXW0)
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i.vex.register_specifier = i.op[0].regs;
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else
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i.vex.register_specifier = i.op[1].regs;
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/* Destination is a XMM register encoded in the ModRM.reg
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and VEX.R bit. */
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i.rm.reg = i.op[2].regs->reg_num;
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if ((i.op[2].regs->reg_flags & RegRex) != 0)
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i.rex |= REX_R;
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/* ModRM.rm and VEX.B encodes the other source. */
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if (!i.mem_operands)
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{
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i.rm.mode = 3;
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if (i.tm.opcode_modifier.vexw == VEXW0)
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i.rm.regmem = i.op[1].regs->reg_num;
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else
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i.rm.regmem = i.op[0].regs->reg_num;
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if ((i.op[1].regs->reg_flags & RegRex) != 0)
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i.rex |= REX_B;
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}
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}
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else if (i.tm.opcode_modifier.vexvvvv == VEXLWP)
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{
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{
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i.vex.register_specifier = i.op[2].regs;
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i.vex.register_specifier = i.op[2].regs;
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if (!i.mem_operands)
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if (!i.mem_operands)
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@ -619,10 +619,8 @@ enum
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OpcodePrefix,
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OpcodePrefix,
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/* number of VEX source operands:
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/* number of VEX source operands:
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0: <= 2 source operands.
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0: <= 2 source operands.
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1: 2 XOP source operands.
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2: 3 source operands.
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2: 3 source operands.
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*/
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*/
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#define XOP2SOURCES 1
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#define VEX3SOURCES 2
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#define VEX3SOURCES 2
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VexSources,
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VexSources,
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/* Instruction with a mandatory SIB byte:
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/* Instruction with a mandatory SIB byte:
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@ -1876,10 +1876,10 @@ vpmacsww, 0x95, XOP, Modrm|SpaceXOP08|VexSources=2|VexVVVV=1|VexW=1|NoSuf|Vex, {
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vpmadcsswd, 0xa6, XOP, Modrm|SpaceXOP08|VexSources=2|VexVVVV=1|VexW=1|NoSuf|Vex, { RegXMM, RegXMM|Unspecified|BaseIndex, RegXMM, RegXMM }
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vpmadcsswd, 0xa6, XOP, Modrm|SpaceXOP08|VexSources=2|VexVVVV=1|VexW=1|NoSuf|Vex, { RegXMM, RegXMM|Unspecified|BaseIndex, RegXMM, RegXMM }
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vpmadcswd, 0xb6, XOP, Modrm|SpaceXOP08|VexSources=2|VexVVVV=1|VexW=1|NoSuf|Vex, { RegXMM, RegXMM|Unspecified|BaseIndex, RegXMM, RegXMM }
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vpmadcswd, 0xb6, XOP, Modrm|SpaceXOP08|VexSources=2|VexVVVV=1|VexW=1|NoSuf|Vex, { RegXMM, RegXMM|Unspecified|BaseIndex, RegXMM, RegXMM }
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vpperm, 0xa3, XOP, D|Modrm|SpaceXOP08|VexSources=2|VexVVVV|VexW0|NoSuf|Vex, { RegXMM, RegXMM|Unspecified|BaseIndex, RegXMM, RegXMM }
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vpperm, 0xa3, XOP, D|Modrm|SpaceXOP08|VexSources=2|VexVVVV|VexW0|NoSuf|Vex, { RegXMM, RegXMM|Unspecified|BaseIndex, RegXMM, RegXMM }
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vprot<xop>, 0x90 | <xop:opc>, XOP, D|Modrm|Vex128|SpaceXOP09|VexW0|VexSources=1|NoSuf, { RegXMM, RegXMM|Unspecified|BaseIndex, RegXMM }
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vprot<xop>, 0x90 | <xop:opc>, XOP, D|Modrm|Vex128|SpaceXOP09|VexVVVV|SwapSources|VexW0|NoSuf, { RegXMM, RegXMM|Unspecified|BaseIndex, RegXMM }
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vprot<xop>, 0xc0 | <xop:opc>, XOP, Modrm|Vex128|SpaceXOP08|VexW0|NoSuf, { Imm8, RegXMM|Unspecified|BaseIndex, RegXMM }
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vprot<xop>, 0xc0 | <xop:opc>, XOP, Modrm|Vex128|SpaceXOP08|VexW0|NoSuf, { Imm8, RegXMM|Unspecified|BaseIndex, RegXMM }
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vpsha<xop>, 0x98 | <xop:opc>, XOP, D|Modrm|Vex128|SpaceXOP09|VexW0|VexSources=1|NoSuf, { RegXMM, RegXMM|Unspecified|BaseIndex, RegXMM }
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vpsha<xop>, 0x98 | <xop:opc>, XOP, D|Modrm|Vex128|SpaceXOP09|VexVVVV|SwapSources|VexW0|NoSuf, { RegXMM, RegXMM|Unspecified|BaseIndex, RegXMM }
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vpshl<xop>, 0x94 | <xop:opc>, XOP, D|Modrm|Vex128|SpaceXOP09|VexW0|VexSources=1|NoSuf, { RegXMM, RegXMM|Unspecified|BaseIndex, RegXMM }
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vpshl<xop>, 0x94 | <xop:opc>, XOP, D|Modrm|Vex128|SpaceXOP09|VexVVVV|SwapSources|VexW0|NoSuf, { RegXMM, RegXMM|Unspecified|BaseIndex, RegXMM }
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<xop>
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<xop>
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<irel>
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<irel>
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@ -43439,8 +43439,8 @@ static const insn_template i386_optab[] =
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{ { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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{ { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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1, 0, 0, 0, 0, 0 } } } },
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1, 0, 0, 0, 0, 0 } } } },
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{ MN_vprotb, 0x90 | 0, 3, SPACE_XOP09, None,
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{ MN_vprotb, 0x90 | 0, 3, SPACE_XOP09, None,
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{ 1, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
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{ 1, 0, 0, 1, 0, 0, 0, 0, 6, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
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0, 0, 0, 1, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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0 },
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0 },
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{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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@ -43473,8 +43473,8 @@ static const insn_template i386_optab[] =
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{ { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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{ { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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1, 0, 0, 0, 0, 0 } } } },
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1, 0, 0, 0, 0, 0 } } } },
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{ MN_vprotw, 0x90 | 1, 3, SPACE_XOP09, None,
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{ MN_vprotw, 0x90 | 1, 3, SPACE_XOP09, None,
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{ 1, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
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{ 1, 0, 0, 1, 0, 0, 0, 0, 6, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
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0, 0, 0, 1, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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0 },
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0 },
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{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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@ -43507,8 +43507,8 @@ static const insn_template i386_optab[] =
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{ { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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{ { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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1, 0, 0, 0, 0, 0 } } } },
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1, 0, 0, 0, 0, 0 } } } },
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{ MN_vprotd, 0x90 | 2, 3, SPACE_XOP09, None,
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{ MN_vprotd, 0x90 | 2, 3, SPACE_XOP09, None,
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{ 1, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
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{ 1, 0, 0, 1, 0, 0, 0, 0, 6, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
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0, 0, 0, 1, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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0 },
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0 },
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{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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@ -43541,8 +43541,8 @@ static const insn_template i386_optab[] =
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{ { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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{ { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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1, 0, 0, 0, 0, 0 } } } },
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1, 0, 0, 0, 0, 0 } } } },
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{ MN_vprotq, 0x90 | 3, 3, SPACE_XOP09, None,
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{ MN_vprotq, 0x90 | 3, 3, SPACE_XOP09, None,
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{ 1, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
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{ 1, 0, 0, 1, 0, 0, 0, 0, 6, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
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0, 0, 0, 1, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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0 },
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0 },
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{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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@ -43575,8 +43575,8 @@ static const insn_template i386_optab[] =
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{ { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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{ { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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1, 0, 0, 0, 0, 0 } } } },
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1, 0, 0, 0, 0, 0 } } } },
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{ MN_vpshab, 0x98 | 0, 3, SPACE_XOP09, None,
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{ MN_vpshab, 0x98 | 0, 3, SPACE_XOP09, None,
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{ 1, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
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{ 1, 0, 0, 1, 0, 0, 0, 0, 6, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
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0, 0, 0, 1, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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0 },
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0 },
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{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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@ -43592,8 +43592,8 @@ static const insn_template i386_optab[] =
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{ { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
{ { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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1, 0, 0, 0, 0, 0 } } } },
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1, 0, 0, 0, 0, 0 } } } },
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{ MN_vpshaw, 0x98 | 1, 3, SPACE_XOP09, None,
|
{ MN_vpshaw, 0x98 | 1, 3, SPACE_XOP09, None,
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{ 1, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
|
{ 1, 0, 0, 1, 0, 0, 0, 0, 6, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
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0, 0, 0, 1, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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0 },
|
0 },
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{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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@ -43609,8 +43609,8 @@ static const insn_template i386_optab[] =
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{ { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
{ { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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1, 0, 0, 0, 0, 0 } } } },
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1, 0, 0, 0, 0, 0 } } } },
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{ MN_vpshad, 0x98 | 2, 3, SPACE_XOP09, None,
|
{ MN_vpshad, 0x98 | 2, 3, SPACE_XOP09, None,
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{ 1, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
|
{ 1, 0, 0, 1, 0, 0, 0, 0, 6, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
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0, 0, 0, 1, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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0 },
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0 },
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{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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||||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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||||||
@ -43626,8 +43626,8 @@ static const insn_template i386_optab[] =
|
|||||||
{ { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
{ { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||||
1, 0, 0, 0, 0, 0 } } } },
|
1, 0, 0, 0, 0, 0 } } } },
|
||||||
{ MN_vpshaq, 0x98 | 3, 3, SPACE_XOP09, None,
|
{ MN_vpshaq, 0x98 | 3, 3, SPACE_XOP09, None,
|
||||||
{ 1, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
|
{ 1, 0, 0, 1, 0, 0, 0, 0, 6, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
|
||||||
0, 0, 0, 1, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||||
0 },
|
0 },
|
||||||
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||||
@ -43643,8 +43643,8 @@ static const insn_template i386_optab[] =
|
|||||||
{ { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
{ { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||||
1, 0, 0, 0, 0, 0 } } } },
|
1, 0, 0, 0, 0, 0 } } } },
|
||||||
{ MN_vpshlb, 0x94 | 0, 3, SPACE_XOP09, None,
|
{ MN_vpshlb, 0x94 | 0, 3, SPACE_XOP09, None,
|
||||||
{ 1, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
|
{ 1, 0, 0, 1, 0, 0, 0, 0, 6, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
|
||||||
0, 0, 0, 1, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||||
0 },
|
0 },
|
||||||
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||||
@ -43660,8 +43660,8 @@ static const insn_template i386_optab[] =
|
|||||||
{ { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
{ { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||||
1, 0, 0, 0, 0, 0 } } } },
|
1, 0, 0, 0, 0, 0 } } } },
|
||||||
{ MN_vpshlw, 0x94 | 1, 3, SPACE_XOP09, None,
|
{ MN_vpshlw, 0x94 | 1, 3, SPACE_XOP09, None,
|
||||||
{ 1, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
|
{ 1, 0, 0, 1, 0, 0, 0, 0, 6, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
|
||||||
0, 0, 0, 1, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||||
0 },
|
0 },
|
||||||
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||||
@ -43677,8 +43677,8 @@ static const insn_template i386_optab[] =
|
|||||||
{ { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
{ { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||||
1, 0, 0, 0, 0, 0 } } } },
|
1, 0, 0, 0, 0, 0 } } } },
|
||||||
{ MN_vpshld, 0x94 | 2, 3, SPACE_XOP09, None,
|
{ MN_vpshld, 0x94 | 2, 3, SPACE_XOP09, None,
|
||||||
{ 1, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
|
{ 1, 0, 0, 1, 0, 0, 0, 0, 6, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
|
||||||
0, 0, 0, 1, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||||
0 },
|
0 },
|
||||||
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||||
@ -43694,8 +43694,8 @@ static const insn_template i386_optab[] =
|
|||||||
{ { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
{ { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||||
1, 0, 0, 0, 0, 0 } } } },
|
1, 0, 0, 0, 0, 0 } } } },
|
||||||
{ MN_vpshlq, 0x94 | 3, 3, SPACE_XOP09, None,
|
{ MN_vpshlq, 0x94 | 3, 3, SPACE_XOP09, None,
|
||||||
{ 1, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
|
{ 1, 0, 0, 1, 0, 0, 0, 0, 6, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
|
||||||
0, 0, 0, 1, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||||
0 },
|
0 },
|
||||||
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||||
|
Reference in New Issue
Block a user