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gas/arm64: don't emit stack pointer symbol table entries

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Without this change, all of

	mov	z0.b, p0/m, wsp
	mov	z0.b, wsp
	mov	z0.d, p0/m, sp
	mov	z0.d, sp

insert stray symbols into the symbol table.
This commit is contained in:
Jan Beulich
2017-11-13 12:27:45 +01:00
committed by Jan Beulich
parent 6465780617
commit 5b2b928e83
2 changed files with 11 additions and 5 deletions
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5
gas/ChangeLog
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@ -1,3 +1,8 @@
2017-11-13 Jan Beulich <jbeulich@suse.com>
* config/tc-aarch64.c (R_Z_BHSDQ_VZP): Rename to ...
(R_Z_SP_BHSDQ_VZP): ... and include both stack pointer variants.
2017-11-13 Jan Beulich <jbeulich@suse.com> 2017-11-13 Jan Beulich <jbeulich@suse.com>
* testsuite/gas/ia64/group-1.d: Adjust expectations. * testsuite/gas/ia64/group-1.d: Adjust expectations.

11
gas/config/tc-aarch64.c
View File

@ -304,10 +304,11 @@ struct reloc_entry
| REG_TYPE(Z_32) | REG_TYPE(Z_64) | REG_TYPE(VN) \ | REG_TYPE(Z_32) | REG_TYPE(Z_64) | REG_TYPE(VN) \
| REG_TYPE(FP_B) | REG_TYPE(FP_H) \ | REG_TYPE(FP_B) | REG_TYPE(FP_H) \
| REG_TYPE(FP_S) | REG_TYPE(FP_D) | REG_TYPE(FP_Q)) \ | REG_TYPE(FP_S) | REG_TYPE(FP_D) | REG_TYPE(FP_Q)) \
/* Typecheck: as above, but also Zn and Pn. This should only be \ /* Typecheck: as above, but also Zn, Pn, and {W}SP. This should only \
used for SVE instructions, since Zn and Pn are valid symbols \ be used for SVE instructions, since Zn and Pn are valid symbols \
in other contexts. */ \ in other contexts. */ \
MULTI_REG_TYPE(R_Z_BHSDQ_VZP, REG_TYPE(R_32) | REG_TYPE(R_64) \ MULTI_REG_TYPE(R_Z_SP_BHSDQ_VZP, REG_TYPE(R_32) | REG_TYPE(R_64) \
| REG_TYPE(SP_32) | REG_TYPE(SP_64) \
| REG_TYPE(Z_32) | REG_TYPE(Z_64) | REG_TYPE(VN) \ | REG_TYPE(Z_32) | REG_TYPE(Z_64) | REG_TYPE(VN) \
| REG_TYPE(FP_B) | REG_TYPE(FP_H) \ | REG_TYPE(FP_B) | REG_TYPE(FP_H) \
| REG_TYPE(FP_S) | REG_TYPE(FP_D) | REG_TYPE(FP_Q) \ | REG_TYPE(FP_S) | REG_TYPE(FP_D) | REG_TYPE(FP_Q) \
@ -415,7 +416,7 @@ get_reg_expected_msg (aarch64_reg_type reg_type)
"register expected"); "register expected");
break; break;
case REG_TYPE_R_Z_BHSDQ_V: case REG_TYPE_R_Z_BHSDQ_V:
case REG_TYPE_R_Z_BHSDQ_VZP: case REG_TYPE_R_Z_SP_BHSDQ_VZP:
msg = N_("register expected"); msg = N_("register expected");
break; break;
case REG_TYPE_BHSDQ: /* any [BHSDQ]P FP */ case REG_TYPE_BHSDQ: /* any [BHSDQ]P FP */
@ -5269,7 +5270,7 @@ parse_operands (char *str, const aarch64_opcode *opcode)
skip_whitespace (str); skip_whitespace (str);
if (AARCH64_CPU_HAS_FEATURE (AARCH64_FEATURE_SVE, *opcode->avariant)) if (AARCH64_CPU_HAS_FEATURE (AARCH64_FEATURE_SVE, *opcode->avariant))
imm_reg_type = REG_TYPE_R_Z_BHSDQ_VZP; imm_reg_type = REG_TYPE_R_Z_SP_BHSDQ_VZP;
else else
imm_reg_type = REG_TYPE_R_Z_BHSDQ_V; imm_reg_type = REG_TYPE_R_Z_BHSDQ_V;