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Enhancement for avx-vnni patch

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1. Rename CpuVEX_PREFIX to PseudoVexPrefix and
   move it from cpu_flags to opcode_modifiers.
2. Delete {vex2} invalid test.
3. Use VexW0 and VexVVVV in the AVX-VNNI instructions.

gas/
	* config/tc-i386.c: Move Pseudo Prefix check to match_template.
	* testsuite/gas/i386/avx-vnni-inval.l: New file.
	* testsuite/gas/i386/avx-vnni-inval.s: Likewise.
	* testsuite/gas/i386/avx-vnni.d: Delete invalid {vex2} test.
	* testsuite/gas/i386/avx-vnni.s: Likewise.
	* testsuite/gas/i386/i386.exp: Add AVX VNNI invalid tests.
	* testsuite/gas/i386/x86-64-avx-vnni-inval.l: New file.
	* testsuite/gas/i386/x86-64-avx-vnni-inval.s: Likewise.
	* testsuite/gas/i386/x86-64-avx-vnni.d: Delete invalid {vex2} test.
	* testsuite/gas/i386/x86-64-avx-vnni.s: Likewise.

opcodes/
	* i386-opc.tbl: Rename CpuVEX_PREFIX to PseudoVexPrefix
	and move it from cpu_flags to opcode_modifiers.
	Use VexW0 and VexVVVV in the AVX-VNNI instructions.
	* i386-gen.c: Likewise.
	* i386-opc.h: Likewise.
	* i386-opc.h: Likewise.
	* i386-init.h: Regenerated.
	* i386-tbl.h: Likewise.
This commit is contained in:
Cui,Lili
2020-10-15 10:45:08 +08:00
parent 51a8a7c2e3
commit 5739259879
17 changed files with 11480 additions and 11456 deletions
Download Patch File Download Diff File Expand all files Collapse all files

11
opcodes/ChangeLog
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@ -1,3 +1,14 @@
2020-10-16 Lili Cui <lili.cui@intel.com>
* i386-opc.tbl: Rename CpuVEX_PREFIX to PseudoVexPrefix
and move it from cpu_flags to opcode_modifiers.
Use VexW0 and VexVVVV in the AVX-VNNI instructions.
* i386-gen.c: Likewise.
* i386-opc.h: Likewise.
* i386-opc.h: Likewise.
* i386-init.h: Regenerated.
* i386-tbl.h: Likewise.
2020-10-14 H.J. Lu <hongjiu.lu@intel.com>
Lili Cui <lili.cui@intel.com>

4
opcodes/i386-gen.c
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@ -408,7 +408,7 @@ static initializer cpu_flag_init[] =
{ "CPU_ANY_AMX_TILE_FLAGS",
"CpuAMX_TILE|CpuAMX_INT8|CpuAMX_BF16" },
{ "CPU_ANY_AVX_VNNI_FLAGS",
"CpuAVX_VNNI|CpuVEX_PREFIX" },
"CpuAVX_VNNI" },
{ "CPU_ANY_MOVDIRI_FLAGS",
"CpuMOVDIRI" },
{ "CPU_ANY_UINTR_FLAGS",
@ -637,7 +637,6 @@ static bitfield cpu_flags[] =
BITFIELD (CpuAVX512_VP2INTERSECT),
BITFIELD (CpuTDX),
BITFIELD (CpuAVX_VNNI),
BITFIELD (CpuVEX_PREFIX),
BITFIELD (CpuMWAITX),
BITFIELD (CpuCLZERO),
BITFIELD (CpuOSPKE),
@ -708,6 +707,7 @@ static bitfield opcode_modifiers[] =
BITFIELD (ImmExt),
BITFIELD (NoRex64),
BITFIELD (Ugh),
BITFIELD (PseudoVexPrefix),
BITFIELD (Vex),
BITFIELD (VexVVVV),
BITFIELD (VexW),

484
opcodes/i386-init.h
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6
opcodes/i386-opc.h
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@ -214,8 +214,6 @@ enum
CpuTDX,
/* Intel AVX VNNI Instructions support required. */
CpuAVX_VNNI,
/* Intel AVX Instructions support via {vex} prefix required. */
CpuVEX_PREFIX,
/* mwaitx instruction required */
CpuMWAITX,
/* Clzero instruction required */
@ -387,7 +385,6 @@ typedef union i386_cpu_flags
unsigned int cpuavx512_vp2intersect:1;
unsigned int cputdx:1;
unsigned int cpuavx_vnni:1;
unsigned int cpuvex_prefix:1;
unsigned int cpumwaitx:1;
unsigned int cpuclzero:1;
unsigned int cpuospke:1;
@ -534,6 +531,8 @@ enum
NoRex64,
/* deprecated fp insn, gets a warning */
Ugh,
/* Intel AVX Instructions support via {vex} prefix */
PseudoVexPrefix,
/* insn has VEX prefix:
1: 128bit VEX prefix (or operand dependent).
2: 256bit VEX prefix.
@ -739,6 +738,7 @@ typedef struct i386_opcode_modifier
unsigned int immext:1;
unsigned int norex64:1;
unsigned int ugh:1;
unsigned int pseudovexprefix:1;
unsigned int vex:2;
unsigned int vexvvvv:2;
unsigned int vexw:2;

8
opcodes/i386-opc.tbl
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@ -3906,11 +3906,11 @@ vpshrdw, 4, 0x6672, None, 1, CpuAVX512_VBMI2, Modrm|Masking=3|OpcodePrefix=2|Vex
// AVX_VNNI instructions
vpdpbusd, 3, 0x6650, None, 1, CpuAVX_VNNI|CpuVEX_PREFIX, Modrm|Vex|OpcodePrefix=1|VexVVVV=1|VexW=1|CheckRegSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Unspecified|BaseIndex|RegXMM|RegYMM, RegXMM|RegYMM, RegXMM|RegYMM }
vpdpwssd, 3, 0x6652, None, 1, CpuAVX_VNNI|CpuVEX_PREFIX, Modrm|Vex|OpcodePrefix=1|VexVVVV=1|VexW=1|CheckRegSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Unspecified|BaseIndex|RegXMM|RegYMM, RegXMM|RegYMM, RegXMM|RegYMM }
vpdpbusd, 3, 0x6650, None, 1, CpuAVX_VNNI, Modrm|Vex|PseudoVexPrefix|OpcodePrefix=1|VexVVVV|VexW0|CheckRegSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Unspecified|BaseIndex|RegXMM|RegYMM, RegXMM|RegYMM, RegXMM|RegYMM }
vpdpwssd, 3, 0x6652, None, 1, CpuAVX_VNNI, Modrm|Vex|PseudoVexPrefix|OpcodePrefix=1|VexVVVV|VexW0|CheckRegSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Unspecified|BaseIndex|RegXMM|RegYMM, RegXMM|RegYMM, RegXMM|RegYMM }
vpdpbusds, 3, 0x6651, None, 1, CpuAVX_VNNI|CpuVEX_PREFIX, Modrm|Vex|OpcodePrefix=1|VexVVVV=1|VexW=1|CheckRegSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Unspecified|BaseIndex|RegXMM|RegYMM, RegXMM|RegYMM, RegXMM|RegYMM }
vpdpwssds, 3, 0x6653, None, 1, CpuAVX_VNNI|CpuVEX_PREFIX, Modrm|Vex|OpcodePrefix=1|VexVVVV=1|VexW=1|CheckRegSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Unspecified|BaseIndex|RegXMM|RegYMM, RegXMM|RegYMM, RegXMM|RegYMM }
vpdpbusds, 3, 0x6651, None, 1, CpuAVX_VNNI, Modrm|Vex|PseudoVexPrefix|OpcodePrefix=1|VexVVVV|VexW0|CheckRegSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Unspecified|BaseIndex|RegXMM|RegYMM, RegXMM|RegYMM, RegXMM|RegYMM }
vpdpwssds, 3, 0x6653, None, 1, CpuAVX_VNNI, Modrm|Vex|PseudoVexPrefix|OpcodePrefix=1|VexVVVV|VexW0|CheckRegSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Unspecified|BaseIndex|RegXMM|RegYMM, RegXMM|RegYMM, RegXMM|RegYMM }
// AVX_VNNI instructions end

22354
opcodes/i386-tbl.h
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