arc: Detect usage of illegal double register pairs

ARC can use odd-even double register pairs in some selected
instructions. Although the GNU assembler doesn't allow even-odd
registers to be used, there may be cases when the disassembler is
presented with such situation.  This patch add a test and detects such
cases.

opcodes/
2020-07-14  Claudiu Zissulescu  <claziss@gmail.com>

	* arc-dis.c (print_insn_arc): Detect and emit a warning when a
	faulty double register pair is detected.

binutils/
2020-07-14  Claudiu Zissulescu  <claziss@gmail.com>

	* testsuite/binutils-all/arc/double_regs.s: New test.
	* testsuite/binutils-all/arc/objdump.exp: Add the above test.

Signed-off-by: Claudiu Zissulescu <claziss@gmail.com>
This commit is contained in:
Claudiu Zissulescu
2020-07-14 14:51:15 +03:00
parent bfbd943845
commit 570b0ed6d5
5 changed files with 27 additions and 3 deletions

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@ -0,0 +1,3 @@
.cpu HS
.text
.byte 0x9e,0x2f,0x20,0x75

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@ -72,6 +72,9 @@ proc check_assembly { testname objfile expected { disas_flags "" } } {
# disassembler has had to guess as the instruction class in use).
set want "Warning: disassembly.*vmac2hnfr\[ \t\]*r0,r2,r4.*dmulh12.f\[ \t\]*r0,r2,r4.*dmulh11.f"
check_assembly "Warning test" [do_objfile dsp.s] $want
set warn_double_reg "Warning: illegal use of double register pair."
check_assembly "Warning faulty double regs" [do_objfile double_regs.s] \
$warn_double_reg
set double_store_hs_expected {std\s*r0r1,\[r3\]}
set objfile [do_objfile double_store.s]