diff --git a/gdb/configure.tgt b/gdb/configure.tgt
index 47a674201f9..96ffc369619 100644
--- a/gdb/configure.tgt
+++ b/gdb/configure.tgt
@@ -106,7 +106,7 @@ loongarch*-*-*)
 
 riscv*-*-*)
 	cpu_obs="riscv-tdep.o riscv-none-tdep.o arch/riscv.o \
-	         ravenscar-thread.o riscv-ravenscar-thread.o";;
+	         ravenscar-thread.o riscv-ravenscar-thread.o solib-svr4.o";;
 
 x86_64-*-*)
 	cpu_obs="${i386_tobjs} ${amd64_tobjs}";;
diff --git a/gdb/riscv-tdep.c b/gdb/riscv-tdep.c
index c6651c80a20..beeb09505fa 100644
--- a/gdb/riscv-tdep.c
+++ b/gdb/riscv-tdep.c
@@ -19,6 +19,7 @@
 
 #include "defs.h"
 #include "frame.h"
+#include "solib-svr4.h"
 #include "inferior.h"
 #include "symtab.h"
 #include "value.h"
@@ -4395,6 +4396,10 @@ riscv_gdbarch_init (struct gdbarch_info info,
 
   register_riscv_ravenscar_ops (gdbarch);
 
+  /* Enable TLS support.  */
+  set_gdbarch_fetch_tls_load_module_address (gdbarch,
+					     svr4_fetch_objfile_link_map);
+
   return gdbarch;
 }
 
diff --git a/gdb/xtensa-tdep.c b/gdb/xtensa-tdep.c
index 29362af75a1..5444ebb7f6a 100644
--- a/gdb/xtensa-tdep.c
+++ b/gdb/xtensa-tdep.c
@@ -28,6 +28,7 @@
 #include "regcache.h"
 #include "reggroups.h"
 #include "regset.h"
+#include "inferior.h"
 
 #include "dwarf2/frame.h"
 #include "frame-base.h"
@@ -3254,6 +3255,10 @@ xtensa_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
   /* Hook in the ABI-specific overrides, if they have been registered.  */
   gdbarch_init_osabi (info, gdbarch);
 
+  /* Enable TLS support.  */
+  set_gdbarch_fetch_tls_load_module_address (gdbarch,
+					     svr4_fetch_objfile_link_map);
+
   return gdbarch;
 }