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[BINUTILS, AARCH64, 6/8] Add Tag getting instruction in Memory Tagging Extension

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This patch is part of the patch series to add support for ARMv8.5-A
Memory Tagging Extensions which is an optional extension to
ARMv8.5-A and is enabled using the +memtag command line option.

This patch add support to the Bulk Allocation Tag instructions from
MTE. These are the following instructions added in this patch:
- LDGV <Xt>, [<Xn|SP>]!
- STGV <Xt>, [<Xn|SP>]!

This needed a new kind of operand for the new addressing [<Xn|SP>]!
since this has no offset and only takes a pre-indexed version.
Hence AARCH64_OPND_ADDR_SIMPLE_2 and ldtdgv_indexed are introduced.
(AARCH64_OPND_ADDR_SIMPLE fulfilled the no offset criteria but does
not allow writeback). We also needed new encoding and decoding
functions to be able to do the same.

where
<Xt> : Is the 64-bit destination GPR.
<Xn|SP> : Is the 64-bit first source GPR or Stack pointer.

*** include/ChangeLog ***

2018-11-12  Sudakshina Das  <sudi.das@arm.com>

	* opcode/aarch64.h (aarch64_opnd): Add AARCH64_OPND_ADDR_SIMPLE_2.
	(aarch64_insn_class): Add ldstgv_indexed.

*** opcodes/ChangeLog ***

2018-11-12  Sudakshina Das  <sudi.das@arm.com>

	* aarch64-asm.c (aarch64_ins_addr_simple_2): New.
	* aarch64-asm.h (ins_addr_simple_2): Declare the above.
	* aarch64-dis.c (aarch64_ext_addr_simple_2): New.
	* aarch64-dis.h (ext_addr_simple_2): Declare the above.
	* aarch64-opc.c (operand_general_constraint_met_p): Add case for
	AARCH64_OPND_ADDR_SIMPLE_2 and ldstgv_indexed.
	(aarch64_print_operand): Add case for AARCH64_OPND_ADDR_SIMPLE_2.
	* aarch64-tbl.h (aarch64_opcode_table): Add stgv and ldgv.
	(AARCH64_OPERANDS): Define ADDR_SIMPLE_2.
	* aarch64-asm-2.c: Regenerated.
	* aarch64-dis-2.c: Regenerated.
	* aarch64-opc-2.c: Regenerated.

*** gas/ChangeLog ***

2018-11-12  Sudakshina Das  <sudi.das@arm.com>

	* config/tc-aarch64.c (parse_operands): Add switch case for
	AARCH64_OPND_ADDR_SIMPLE_2 and allow [base]! for it.
	(warn_unpredictable_ldst): Exempt ldstgv_indexed for ldgv.
	* testsuite/gas/aarch64/armv8_5-a-memtag.s: Add tests for ldgv and stgv.
	* testsuite/gas/aarch64/armv8_5-a-memtag.d: Likewise.
	* testsuite/gas/aarch64/illegal-memtag.s: Likewise.
	* testsuite/gas/aarch64/illegal-memtag.l: Likewise.
This commit is contained in:
Sudakshina Das
2018-11-12 13:19:12 +00:00
parent e6025b546c
commit 503ba60025
18 changed files with 1794 additions and 1638 deletions
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1
opcodes/aarch64-asm.h
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@ -59,6 +59,7 @@ AARCH64_DECL_OPD_INSERTER (ins_limm);
AARCH64_DECL_OPD_INSERTER (ins_inv_limm);
AARCH64_DECL_OPD_INSERTER (ins_ft);
AARCH64_DECL_OPD_INSERTER (ins_addr_simple);
AARCH64_DECL_OPD_INSERTER (ins_addr_simple_2);
AARCH64_DECL_OPD_INSERTER (ins_addr_offset);
AARCH64_DECL_OPD_INSERTER (ins_addr_regoff);
AARCH64_DECL_OPD_INSERTER (ins_addr_simm);