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* gas/config/tc-arm.c (arm_cpus): Correct canonical names for Cortex CPUs.
* gas/testsuite/gas/arm/attr-cpu-directive.d: Update test for change in canonical CPU name. * gas/testsuite/gas/arm/attr-mcpu.d: Likewise. * ld/testsuite/ld-arm/attr-merge-6.attr: Update tests for change in canonical CPU name. * ld/testsuite/ld-arm/attr-merge-7.attr: Likewise. * ld/testsuite/ld-arm/attr-merge-2.attr: Likewise. * ld/testsuite/ld-arm/attr-merge-arch-2.attr: Likewise.
This commit is contained in:
@ -1,3 +1,7 @@
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2010-09-20 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
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* config/tc-arm.c (arm_cpus): Correct canonical names for Cortex CPUs.
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2010-09-20 Richard Henderson <rth@redhat.com>
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2010-09-20 Richard Henderson <rth@redhat.com>
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* config/tc-alpha.c (tc_gen_reloc): Remove hack around
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* config/tc-alpha.c (tc_gen_reloc): Remove hack around
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@ -22364,27 +22364,28 @@ static const struct arm_cpu_option_table arm_cpus[] =
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{"arm1136j-s", ARM_ARCH_V6, FPU_NONE, NULL},
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{"arm1136j-s", ARM_ARCH_V6, FPU_NONE, NULL},
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{"arm1136jfs", ARM_ARCH_V6, FPU_ARCH_VFP_V2, "ARM1136JF-S"},
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{"arm1136jfs", ARM_ARCH_V6, FPU_ARCH_VFP_V2, "ARM1136JF-S"},
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{"arm1136jf-s", ARM_ARCH_V6, FPU_ARCH_VFP_V2, NULL},
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{"arm1136jf-s", ARM_ARCH_V6, FPU_ARCH_VFP_V2, NULL},
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{"mpcore", ARM_ARCH_V6K, FPU_ARCH_VFP_V2, NULL},
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{"mpcore", ARM_ARCH_V6K, FPU_ARCH_VFP_V2, "MPCore"},
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{"mpcorenovfp", ARM_ARCH_V6K, FPU_NONE, NULL},
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{"mpcorenovfp", ARM_ARCH_V6K, FPU_NONE, "MPCore"},
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{"arm1156t2-s", ARM_ARCH_V6T2, FPU_NONE, NULL},
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{"arm1156t2-s", ARM_ARCH_V6T2, FPU_NONE, NULL},
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{"arm1156t2f-s", ARM_ARCH_V6T2, FPU_ARCH_VFP_V2, NULL},
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{"arm1156t2f-s", ARM_ARCH_V6T2, FPU_ARCH_VFP_V2, NULL},
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{"arm1176jz-s", ARM_ARCH_V6ZK, FPU_NONE, NULL},
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{"arm1176jz-s", ARM_ARCH_V6ZK, FPU_NONE, NULL},
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{"arm1176jzf-s", ARM_ARCH_V6ZK, FPU_ARCH_VFP_V2, NULL},
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{"arm1176jzf-s", ARM_ARCH_V6ZK, FPU_ARCH_VFP_V2, NULL},
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{"cortex-a5", ARM_ARCH_V7A, FPU_NONE, NULL},
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{"cortex-a5", ARM_ARCH_V7A, FPU_NONE, "Cortex-A5"},
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{"cortex-a8", ARM_ARCH_V7A, ARM_FEATURE (0, FPU_VFP_V3
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{"cortex-a8", ARM_ARCH_V7A, ARM_FEATURE (0, FPU_VFP_V3
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| FPU_NEON_EXT_V1),
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| FPU_NEON_EXT_V1),
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NULL},
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"Cortex-A8"},
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{"cortex-a9", ARM_ARCH_V7A, ARM_FEATURE (0, FPU_VFP_V3
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{"cortex-a9", ARM_ARCH_V7A, ARM_FEATURE (0, FPU_VFP_V3
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| FPU_NEON_EXT_V1),
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| FPU_NEON_EXT_V1),
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NULL},
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"Cortex-A9"},
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{"cortex-a15", ARM_ARCH_V7A, FPU_ARCH_NEON_VFP_V4,
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{"cortex-a15", ARM_ARCH_V7A, FPU_ARCH_NEON_VFP_V4,
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"Cortex-A15"},
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"Cortex-A15"},
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{"cortex-r4", ARM_ARCH_V7R, FPU_NONE, NULL},
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{"cortex-r4", ARM_ARCH_V7R, FPU_NONE, "Cortex-R4"},
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{"cortex-r4f", ARM_ARCH_V7R, FPU_ARCH_VFP_V3D16, NULL},
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{"cortex-r4f", ARM_ARCH_V7R, FPU_ARCH_VFP_V3D16,
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{"cortex-m4", ARM_ARCH_V7EM, FPU_NONE, NULL},
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"Cortex-R4F"},
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{"cortex-m3", ARM_ARCH_V7M, FPU_NONE, NULL},
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{"cortex-m4", ARM_ARCH_V7EM, FPU_NONE, "Cortex-M4"},
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{"cortex-m1", ARM_ARCH_V6M, FPU_NONE, NULL},
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{"cortex-m3", ARM_ARCH_V7M, FPU_NONE, "Cortex-M3"},
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{"cortex-m0", ARM_ARCH_V6M, FPU_NONE, NULL},
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{"cortex-m1", ARM_ARCH_V6M, FPU_NONE, "Cortex-M1"},
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{"cortex-m0", ARM_ARCH_V6M, FPU_NONE, "Cortex-M0"},
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/* ??? XSCALE is really an architecture. */
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/* ??? XSCALE is really an architecture. */
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{"xscale", ARM_ARCH_XSCALE, FPU_ARCH_VFP_V2, NULL},
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{"xscale", ARM_ARCH_XSCALE, FPU_ARCH_VFP_V2, NULL},
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/* ??? iwmmxt is not a processor. */
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/* ??? iwmmxt is not a processor. */
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@ -1,3 +1,9 @@
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2010-09-20 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
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* gas/arm/attr-cpu-directive.d: Update test for change in canonical
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CPU name.
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* gas/arm/attr-mcpu.d: Likewise.
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2010-09-20 Richard Henderson <rth@redhat.com>
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2010-09-20 Richard Henderson <rth@redhat.com>
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* gas/elf/elf.exp: Disable symtab test for alpha.
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* gas/elf/elf.exp: Disable symtab test for alpha.
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@ -7,7 +7,7 @@
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Attribute Section: aeabi
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Attribute Section: aeabi
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File Attributes
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File Attributes
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Tag_CPU_name: "CORTEX-A8"
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Tag_CPU_name: "Cortex-A8"
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Tag_CPU_arch: v7
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Tag_CPU_arch: v7
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Tag_CPU_arch_profile: Application
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Tag_CPU_arch_profile: Application
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Tag_ARM_ISA_use: Yes
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Tag_ARM_ISA_use: Yes
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@ -7,7 +7,7 @@
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Attribute Section: aeabi
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Attribute Section: aeabi
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File Attributes
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File Attributes
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Tag_CPU_name: "CORTEX-A8"
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Tag_CPU_name: "Cortex-A8"
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Tag_CPU_arch: v7
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Tag_CPU_arch: v7
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Tag_CPU_arch_profile: Application
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Tag_CPU_arch_profile: Application
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Tag_ARM_ISA_use: Yes
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Tag_ARM_ISA_use: Yes
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@ -1,3 +1,11 @@
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2010-09-20 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
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* ld-arm/attr-merge-6.attr: Update test for change in canonical CPU
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name.
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* ld-arm/attr-merge-7.attr: Likewise.
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* ld-arm/attr-merge-2.attr: Likewise.
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* ld-arm/attr-merge-arch-2.attr: Likewise.
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2010-09-20 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
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2010-09-20 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
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* ld-arm/script-type.ld: Update to generate symbols in a section.
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* ld-arm/script-type.ld: Update to generate symbols in a section.
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@ -1,6 +1,6 @@
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Attribute Section: aeabi
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Attribute Section: aeabi
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File Attributes
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File Attributes
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Tag_CPU_name: "CORTEX-A9"
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Tag_CPU_name: "Cortex-A9"
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Tag_CPU_arch: v7
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Tag_CPU_arch: v7
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Tag_CPU_arch_profile: Application
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Tag_CPU_arch_profile: Application
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Tag_ARM_ISA_use: Yes
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Tag_ARM_ISA_use: Yes
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@ -1,6 +1,6 @@
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Attribute Section: aeabi
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Attribute Section: aeabi
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File Attributes
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File Attributes
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Tag_CPU_name: "CORTEX-A9"
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Tag_CPU_name: "Cortex-A9"
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Tag_CPU_arch: v7
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Tag_CPU_arch: v7
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Tag_CPU_arch_profile: Application
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Tag_CPU_arch_profile: Application
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Tag_ARM_ISA_use: Yes
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Tag_ARM_ISA_use: Yes
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@ -1,7 +1,7 @@
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Attribute Section: aeabi
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Attribute Section: aeabi
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File Attributes
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File Attributes
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Tag_CPU_raw_name: "arch_v6k"
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Tag_CPU_raw_name: "arch_v6k"
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Tag_CPU_name: "MPCORE"
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Tag_CPU_name: "MPCore"
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Tag_CPU_arch: v6K
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Tag_CPU_arch: v6K
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Tag_ARM_ISA_use: Yes
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Tag_ARM_ISA_use: Yes
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Tag_THUMB_ISA_use: Thumb-1
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Tag_THUMB_ISA_use: Thumb-1
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