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Compute write back value for post increment loads before

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performing the load in case the offset register is overwritten.
This commit is contained in:
Nick Clifton
2000-08-15 00:10:52 +00:00
parent 046b3b54ee
commit 4bc1de7b2d
2 changed files with 47 additions and 34 deletions
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6
sim/arm/ChangeLog
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@ -1,3 +1,9 @@
2000-08-14 Nick Clifton <nickc@redhat.com>
* armemu.c (LHPOSTDOWN): Compute write back value before
performing load in case the offset register is overwritten.
(LHPOSTUP): Ditto.
2000-07-14 Fernando Nasser <fnasser@cygnus.com> 2000-07-14 Fernando Nasser <fnasser@cygnus.com>
* wrapper.c (sim_create_inferior): Fix typo in the previous patch. * wrapper.c (sim_create_inferior): Fix typo in the previous patch.

75
sim/arm/armemu.c
View File

@ -106,60 +106,67 @@ extern int stop_simulator;
if (StoreHalfWord(state, instr, temp)) \ if (StoreHalfWord(state, instr, temp)) \
LSBase = temp ; LSBase = temp ;
/* load post decrement writeback */ /* Load post decrement writeback. */
#define LHPOSTDOWN() \ #define LHPOSTDOWN() \
{ \ { \
int done = 1 ; \ int done = 1; \
lhs = LHS ; \ lhs = LHS; \
switch (BITS(5,6)) { \ temp = lhs - GetLS7RHS (state, instr); \
\
switch (BITS (5, 6)) \
{ \
case 1: /* H */ \ case 1: /* H */ \
if (LoadHalfWord(state,instr,lhs,LUNSIGNED)) \ if (LoadHalfWord (state, instr, lhs, LUNSIGNED)) \
LSBase = lhs - GetLS7RHS(state,instr) ; \ LSBase = temp; \
break ; \ break; \
case 2: /* SB */ \ case 2: /* SB */ \
if (LoadByte(state,instr,lhs,LSIGNED)) \ if (LoadByte (state, instr, lhs, LSIGNED)) \
LSBase = lhs - GetLS7RHS(state,instr) ; \ LSBase = temp; \
break ; \ break; \
case 3: /* SH */ \ case 3: /* SH */ \
if (LoadHalfWord(state,instr,lhs,LSIGNED)) \ if (LoadHalfWord (state, instr, lhs, LSIGNED)) \
LSBase = lhs - GetLS7RHS(state,instr) ; \ LSBase = temp; \
break ; \ break; \
case 0: /* SWP handled elsewhere */ \ case 0: /* SWP handled elsewhere. */ \
default: \ default: \
done = 0 ; \ done = 0; \
break ; \ break; \
} \ } \
if (done) \ if (done) \
break ; \ break; \
} }
/* load post increment writeback */ /* Load post increment writeback. */
#define LHPOSTUP() \ #define LHPOSTUP() \
{ \ { \
int done = 1 ; \ int done = 1; \
lhs = LHS ; \ lhs = LHS; \
switch (BITS(5,6)) { \ temp = lhs + GetLS7RHS (state, instr); \
\
switch (BITS (5, 6)) \
{ \
case 1: /* H */ \ case 1: /* H */ \
if (LoadHalfWord(state,instr,lhs,LUNSIGNED)) \ if (LoadHalfWord (state, instr, lhs, LUNSIGNED)) \
LSBase = lhs + GetLS7RHS(state,instr) ; \ LSBase = temp; \
break ; \ break; \
case 2: /* SB */ \ case 2: /* SB */ \
if (LoadByte(state,instr,lhs,LSIGNED)) \ if (LoadByte (state, instr, lhs, LSIGNED)) \
LSBase = lhs + GetLS7RHS(state,instr) ; \ LSBase = temp; \
break ; \ break; \
case 3: /* SH */ \ case 3: /* SH */ \
if (LoadHalfWord(state,instr,lhs,LSIGNED)) \ if (LoadHalfWord (state, instr, lhs, LSIGNED)) \
LSBase = lhs + GetLS7RHS(state,instr) ; \ LSBase = temp; \
break ; \ break; \
case 0: /* SWP handled elsewhere */ \ case 0: /* SWP handled elsewhere. */ \
default: \ default: \
done = 0 ; \ done = 0; \
break ; \ break; \
} \ } \
if (done) \ if (done) \
break ; \ break; \
} }
/* load pre decrement */ /* load pre decrement */
#define LHPREDOWN() \ #define LHPREDOWN() \
{ \ { \