mirror of
https://github.com/espressif/binutils-gdb.git
synced 2025-10-17 04:43:17 +08:00
2010-02-08 Christophe Lyon <christophe.lyon@st.com>
gas/ * config/tc-arm.c (md_pcrel_from_section): Keep base to zero for non-local branches (BFD_RELOC_THUMB_PCREL_BRANCH23, BFD_RELOC_THUMB_PCREL_BLX, BFD_RELOC_ARM_PCREL_BLX, BFD_RELOC_ARM_PCREL_CALL) gas/testsuite/ * gas/arm/branch-reloc.s, gas/arm/branch-reloc.d, gas/arm/branch-reloc.l: New tests and expected results with all variants of call: ARM/Thumb, local/global, inter/intra-section, using BL/BLX.
This commit is contained in:
Christophe Lyon
@ -1,3 +1,10 @@
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2010-02-08 Christophe Lyon <christophe.lyon@st.com>
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* config/tc-arm.c (md_pcrel_from_section): Keep base to zero for
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non-local branches (BFD_RELOC_THUMB_PCREL_BRANCH23,
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BFD_RELOC_THUMB_PCREL_BLX, BFD_RELOC_ARM_PCREL_BLX,
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BFD_RELOC_ARM_PCREL_CALL)
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2010-02-08 Sterling Augustine <sterling@tensilica.com>
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2010-02-08 Sterling Augustine <sterling@tensilica.com>
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* config/tc-xtensa.c (frag_format_size): Generalize logic to
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* config/tc-xtensa.c (frag_format_size): Generalize logic to
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@ -19240,7 +19240,9 @@ md_pcrel_from_section (fixS * fixP, segT seg)
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return base + 4;
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return base + 4;
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case BFD_RELOC_THUMB_PCREL_BRANCH23:
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case BFD_RELOC_THUMB_PCREL_BRANCH23:
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if (fixP->fx_addsy
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if (fixP->fx_addsy
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&& (S_GET_SEGMENT (fixP->fx_addsy) == seg)
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&& (!S_IS_EXTERNAL (fixP->fx_addsy))
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&& ARM_IS_FUNC (fixP->fx_addsy)
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&& ARM_IS_FUNC (fixP->fx_addsy)
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&& ARM_CPU_HAS_FEATURE (selected_cpu, arm_ext_v5t))
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&& ARM_CPU_HAS_FEATURE (selected_cpu, arm_ext_v5t))
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base = fixP->fx_where + fixP->fx_frag->fr_address;
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base = fixP->fx_where + fixP->fx_frag->fr_address;
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@ -19248,8 +19250,10 @@ md_pcrel_from_section (fixS * fixP, segT seg)
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/* BLX is like branches above, but forces the low two bits of PC to
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/* BLX is like branches above, but forces the low two bits of PC to
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zero. */
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zero. */
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case BFD_RELOC_THUMB_PCREL_BLX:
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case BFD_RELOC_THUMB_PCREL_BLX:
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if (fixP->fx_addsy
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if (fixP->fx_addsy
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&& (S_GET_SEGMENT (fixP->fx_addsy) == seg)
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&& (!S_IS_EXTERNAL (fixP->fx_addsy))
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&& THUMB_IS_FUNC (fixP->fx_addsy)
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&& THUMB_IS_FUNC (fixP->fx_addsy)
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&& ARM_CPU_HAS_FEATURE (selected_cpu, arm_ext_v5t))
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&& ARM_CPU_HAS_FEATURE (selected_cpu, arm_ext_v5t))
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base = fixP->fx_where + fixP->fx_frag->fr_address;
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base = fixP->fx_where + fixP->fx_frag->fr_address;
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@ -19258,18 +19262,22 @@ md_pcrel_from_section (fixS * fixP, segT seg)
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/* ARM mode branches are offset by +8. However, the Windows CE
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/* ARM mode branches are offset by +8. However, the Windows CE
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loader expects the relocation not to take this into account. */
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loader expects the relocation not to take this into account. */
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case BFD_RELOC_ARM_PCREL_BLX:
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case BFD_RELOC_ARM_PCREL_BLX:
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if (fixP->fx_addsy
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if (fixP->fx_addsy
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&& (S_GET_SEGMENT (fixP->fx_addsy) == seg)
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&& (!S_IS_EXTERNAL (fixP->fx_addsy))
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&& ARM_IS_FUNC (fixP->fx_addsy)
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&& ARM_IS_FUNC (fixP->fx_addsy)
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&& ARM_CPU_HAS_FEATURE (selected_cpu, arm_ext_v5t))
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&& ARM_CPU_HAS_FEATURE (selected_cpu, arm_ext_v5t))
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base = fixP->fx_where + fixP->fx_frag->fr_address;
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base = fixP->fx_where + fixP->fx_frag->fr_address;
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return base + 8;
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return base + 8;
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case BFD_RELOC_ARM_PCREL_CALL:
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case BFD_RELOC_ARM_PCREL_CALL:
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if (fixP->fx_addsy
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if (fixP->fx_addsy
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&& (S_GET_SEGMENT (fixP->fx_addsy) == seg)
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&& (!S_IS_EXTERNAL (fixP->fx_addsy))
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&& THUMB_IS_FUNC (fixP->fx_addsy)
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&& THUMB_IS_FUNC (fixP->fx_addsy)
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&& ARM_CPU_HAS_FEATURE (selected_cpu, arm_ext_v5t))
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&& ARM_CPU_HAS_FEATURE (selected_cpu, arm_ext_v5t))
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base = fixP->fx_where + fixP->fx_frag->fr_address;
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base = fixP->fx_where + fixP->fx_frag->fr_address;
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return base + 8;
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return base + 8;
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case BFD_RELOC_ARM_PCREL_BRANCH:
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case BFD_RELOC_ARM_PCREL_BRANCH:
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case BFD_RELOC_ARM_PCREL_JUMP:
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case BFD_RELOC_ARM_PCREL_JUMP:
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@ -1,3 +1,10 @@
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2010-02-08 Christophe Lyon <christophe.lyon@st.com>
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* gas/arm/branch-reloc.s, gas/arm/branch-reloc.d,
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gas/arm/branch-reloc.l: New tests and expected results with all
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variants of call: ARM/Thumb, local/global, inter/intra-section,
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using BL/BLX.
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2010-02-08 Christophe Lyon <christophe.lyon@st.com>
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2010-02-08 Christophe Lyon <christophe.lyon@st.com>
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* gas/arm/arm-it-auto.d: Update expected results.
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* gas/arm/arm-it-auto.d: Update expected results.
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89
gas/testsuite/gas/arm/branch-reloc.d
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89
gas/testsuite/gas/arm/branch-reloc.d
Normal file
@ -0,0 +1,89 @@
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#name: Inter-section branch relocations
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#This test is only valid on ELF based ports.
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#not-target: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix*
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#as: -march=armv5t
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#objdump: -rd
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#stderr: branch-reloc.l
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# Test the generation of relocation for inter-section branches
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.*: +file format.*arm.*
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Disassembly of section .text:
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00000000 <arm_glob_sym1-0x4>:
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0: e1a00000 nop ; \(mov r0, r0\)
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00000004 <arm_glob_sym1>:
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4: ebfffffe bl 46 <thumb_glob_sym1>
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4: R_ARM_CALL thumb_glob_sym1
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8: ebfffffe bl 100 <thumb_glob_sym2>
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8: R_ARM_CALL thumb_glob_sym2
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c: fa00000c blx 44 <thumb_sym1>
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10: ebfffffe bl 4 <arm_glob_sym1>
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10: R_ARM_CALL arm_glob_sym1
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14: ebfffffe bl 13c <arm_glob_sym2>
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14: R_ARM_CALL arm_glob_sym2
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18: eb000007 bl 3c <arm_sym1>
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1c: fafffffe blx 46 <thumb_glob_sym1>
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1c: R_ARM_CALL thumb_glob_sym1
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20: fafffffe blx 100 <thumb_glob_sym2>
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20: R_ARM_CALL thumb_glob_sym2
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24: fa000006 blx 44 <thumb_sym1>
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28: fafffffe blx 4 <arm_glob_sym1>
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28: R_ARM_CALL arm_glob_sym1
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2c: fafffffe blx 13c <arm_glob_sym2>
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2c: R_ARM_CALL arm_glob_sym2
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30: eb000001 bl 3c <arm_sym1>
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34: e1a00000 nop ; \(mov r0, r0\)
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38: e12fff1e bx lr
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0000003c <arm_sym1>:
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3c: e1a00000 nop ; \(mov r0, r0\)
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40: e12fff1e bx lr
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00000044 <thumb_sym1>:
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44: 4770 bx lr
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00000046 <thumb_glob_sym1>:
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46: 4770 bx lr
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Disassembly of section foo:
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00000000 <thumb_glob_sym2-0x100>:
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...
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00000100 <thumb_glob_sym2>:
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100: f7ff fffe bl 4 <thumb_glob_sym2-0xfc>
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100: R_ARM_THM_CALL arm_glob_sym1
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104: f7ff fffe bl 13c <arm_glob_sym2>
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104: R_ARM_THM_CALL arm_glob_sym2
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108: f000 e816 blx 138 <arm_sym2>
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10c: f7ff fffe bl 46 <thumb_glob_sym2-0xba>
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10c: R_ARM_THM_CALL thumb_glob_sym1
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110: f7ff fffe bl 100 <thumb_glob_sym2>
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110: R_ARM_THM_CALL thumb_glob_sym2
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114: f000 f80e bl 134 <thumb_sym2>
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118: f7ff effe blx 4 <thumb_glob_sym2-0xfc>
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118: R_ARM_THM_CALL arm_glob_sym1
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11c: f7ff effe blx 13c <arm_glob_sym2>
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11c: R_ARM_THM_CALL arm_glob_sym2
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120: f000 e80a blx 138 <arm_sym2>
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124: f7ff effe blx 46 <thumb_glob_sym2-0xba>
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124: R_ARM_THM_CALL thumb_glob_sym1
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128: f7ff effe blx 100 <thumb_glob_sym2>
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128: R_ARM_THM_CALL thumb_glob_sym2
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12c: f000 f802 bl 134 <thumb_sym2>
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130: 46c0 nop ; \(mov r8, r8\)
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132: 4770 bx lr
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00000134 <thumb_sym2>:
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134: 46c0 nop ; \(mov r8, r8\)
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136: 4770 bx lr
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00000138 <arm_sym2>:
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138: e12fff1e bx lr
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0000013c <arm_glob_sym2>:
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13c: e12fff1e bx lr
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3
gas/testsuite/gas/arm/branch-reloc.l
Normal file
3
gas/testsuite/gas/arm/branch-reloc.l
Normal file
@ -0,0 +1,3 @@
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[^:]*: Assembler messages:
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[^:]*:[0-9]*: Warning: blx to 'arm_sym1' an ARM ISA state function changed to bl
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[^:]*:[0-9]*: Warning: blx to Thumb func 'thumb_sym2' from Thumb ISA state changed to bl
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87
gas/testsuite/gas/arm/branch-reloc.s
Normal file
87
gas/testsuite/gas/arm/branch-reloc.s
Normal file
@ -0,0 +1,87 @@
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@ Check that non-local branches with and without mode switching
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@ produce the right relocations with appropriate in-place addends.
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.syntax unified
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.text
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.arm
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.global arm_glob_sym1
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.global arm_glob_sym2
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.global thumb_glob_sym1
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.global thumb_glob_sym2
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nop
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.type arm_glob_sym1, %function
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arm_glob_sym1:
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bl thumb_glob_sym1
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bl thumb_glob_sym2
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bl thumb_sym1
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bl arm_glob_sym1
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bl arm_glob_sym2
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bl arm_sym1
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blx thumb_glob_sym1
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blx thumb_glob_sym2
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blx thumb_sym1
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blx arm_glob_sym1
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blx arm_glob_sym2
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blx arm_sym1
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nop
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bx lr
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.type arm_sym1, %function
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arm_sym1:
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nop
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bx lr
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.thumb
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.thumb_func
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.type thumb_sym1, %function
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thumb_sym1:
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bx lr
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.type thumb_glob_sym1, %function
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.thumb_func
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.thumb
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thumb_glob_sym1:
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bx lr
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.section foo,"ax"
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@ Add some space to avoid confusing objdump output: as we are
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@ producing a relocatable file, objdump may match an address to
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@ the wrong symbol (as symbols in different sections may have the same
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@ address in the object file).
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.space 0x100
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.type thumb_glob_sym2, %function
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.thumb_func
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.thumb
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thumb_glob_sym2:
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bl arm_glob_sym1
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bl arm_glob_sym2
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bl arm_sym2
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bl thumb_glob_sym1
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bl thumb_glob_sym2
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bl thumb_sym2
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blx arm_glob_sym1
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blx arm_glob_sym2
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blx arm_sym2
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blx thumb_glob_sym1
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blx thumb_glob_sym2
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blx thumb_sym2
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nop
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bx lr
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.type thumb_sym2, %function
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thumb_sym2:
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nop
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bx lr
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.arm
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.type arm_sym2, %function
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arm_sym2:
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bx lr
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.global arm_glob_sym2
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.type arm_glob_sym2, %function
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arm_glob_sym2:
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bx lr
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