mirror of
https://github.com/espressif/binutils-gdb.git
synced 2025-10-10 17:38:04 +08:00
Update function declarations to ISO C90 formatting
This commit is contained in:
Nick Clifton
@ -1,23 +1,24 @@
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/* Disassembler for the PA-RISC. Somewhat derived from sparc-pinsn.c.
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Copyright 1989, 1990, 1992, 1993, 1994, 1995, 1998, 1999, 2000, 2001, 2003
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Free Software Foundation, Inc.
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Copyright 1989, 1990, 1992, 1993, 1994, 1995, 1998, 1999, 2000, 2001, 2003,
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2005 Free Software Foundation, Inc.
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Contributed by the Center for Software Science at the
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University of Utah (pa-gdb-bugs@cs.utah.edu).
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
|
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the Free Software Foundation; either version 2 of the License, or
|
||||
(at your option) any later version.
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This program is free software; you can redistribute it and/or modify
|
||||
it under the terms of the GNU General Public License as published by
|
||||
the Free Software Foundation; either version 2 of the License, or
|
||||
(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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||||
GNU General Public License for more details.
|
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
GNU General Public License for more details.
|
||||
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||||
You should have received a copy of the GNU General Public License
|
||||
along with this program; if not, write to the Free Software
|
||||
Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
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You should have received a copy of the GNU General Public License
|
||||
along with this program; if not, write to the Free Software
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||||
Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
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MA 02110-1301, USA. */
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#include "sysdep.h"
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#include "dis-asm.h"
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@ -27,32 +28,36 @@ Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
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/* Integer register names, indexed by the numbers which appear in the
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opcodes. */
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static const char *const reg_names[] =
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{"flags", "r1", "rp", "r3", "r4", "r5", "r6", "r7", "r8", "r9",
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{
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"flags", "r1", "rp", "r3", "r4", "r5", "r6", "r7", "r8", "r9",
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"r10", "r11", "r12", "r13", "r14", "r15", "r16", "r17", "r18", "r19",
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"r20", "r21", "r22", "r23", "r24", "r25", "r26", "dp", "ret0", "ret1",
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"sp", "r31"};
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"sp", "r31"
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};
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/* Floating point register names, indexed by the numbers which appear in the
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opcodes. */
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static const char *const fp_reg_names[] =
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{"fpsr", "fpe2", "fpe4", "fpe6",
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{
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"fpsr", "fpe2", "fpe4", "fpe6",
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"fr4", "fr5", "fr6", "fr7", "fr8",
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"fr9", "fr10", "fr11", "fr12", "fr13", "fr14", "fr15",
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"fr16", "fr17", "fr18", "fr19", "fr20", "fr21", "fr22", "fr23",
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"fr24", "fr25", "fr26", "fr27", "fr28", "fr29", "fr30", "fr31"};
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"fr24", "fr25", "fr26", "fr27", "fr28", "fr29", "fr30", "fr31"
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};
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typedef unsigned int CORE_ADDR;
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/* Get at various relevent fields of an instruction word. */
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#define MASK_5 0x1f
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#define MASK_5 0x1f
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#define MASK_10 0x3ff
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#define MASK_11 0x7ff
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#define MASK_14 0x3fff
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#define MASK_16 0xffff
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#define MASK_21 0x1fffff
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/* These macros get bit fields using HP's numbering (MSB = 0) */
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/* These macros get bit fields using HP's numbering (MSB = 0). */
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#define GET_FIELD(X, FROM, TO) \
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((X) >> (31 - (TO)) & ((1 << ((TO) - (FROM) + 1)) - 1))
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@ -63,7 +68,8 @@ typedef unsigned int CORE_ADDR;
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/* Some of these have been converted to 2-d arrays because they
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consume less storage this way. If the maintenance becomes a
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problem, convert them back to const 1-d pointer arrays. */
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static const char *const control_reg[] = {
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static const char *const control_reg[] =
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{
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"rctr", "cr1", "cr2", "cr3", "cr4", "cr5", "cr6", "cr7",
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"pidr1", "pidr2", "ccr", "sar", "pidr3", "pidr4",
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"iva", "eiem", "itmr", "pcsq", "pcoq", "iir", "isr",
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@ -71,55 +77,69 @@ static const char *const control_reg[] = {
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"tr4", "tr5", "tr6", "tr7"
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};
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static const char *const compare_cond_names[] = {
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static const char *const compare_cond_names[] =
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{
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"", ",=", ",<", ",<=", ",<<", ",<<=", ",sv", ",od",
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",tr", ",<>", ",>=", ",>", ",>>=", ",>>", ",nsv", ",ev"
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};
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static const char *const compare_cond_64_names[] = {
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static const char *const compare_cond_64_names[] =
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{
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"", ",*=", ",*<", ",*<=", ",*<<", ",*<<=", ",*sv", ",*od",
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",*tr", ",*<>", ",*>=", ",*>", ",*>>=", ",*>>", ",*nsv", ",*ev"
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};
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static const char *const cmpib_cond_64_names[] = {
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static const char *const cmpib_cond_64_names[] =
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{
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",*<<", ",*=", ",*<", ",*<=", ",*>>=", ",*<>", ",*>=", ",*>"
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};
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static const char *const add_cond_names[] = {
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static const char *const add_cond_names[] =
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{
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"", ",=", ",<", ",<=", ",nuv", ",znv", ",sv", ",od",
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",tr", ",<>", ",>=", ",>", ",uv", ",vnz", ",nsv", ",ev"
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};
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static const char *const add_cond_64_names[] = {
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static const char *const add_cond_64_names[] =
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{
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"", ",*=", ",*<", ",*<=", ",*nuv", ",*znv", ",*sv", ",*od",
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",*tr", ",*<>", ",*>=", ",*>", ",*uv", ",*vnz", ",*nsv", ",*ev"
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};
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static const char *const wide_add_cond_names[] = {
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static const char *const wide_add_cond_names[] =
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{
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"", ",=", ",<", ",<=", ",nuv", ",*=", ",*<", ",*<=",
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",tr", ",<>", ",>=", ",>", ",uv", ",*<>", ",*>=", ",*>"
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};
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static const char *const logical_cond_names[] = {
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static const char *const logical_cond_names[] =
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{
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"", ",=", ",<", ",<=", 0, 0, 0, ",od",
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",tr", ",<>", ",>=", ",>", 0, 0, 0, ",ev"};
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static const char *const logical_cond_64_names[] = {
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static const char *const logical_cond_64_names[] =
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{
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"", ",*=", ",*<", ",*<=", 0, 0, 0, ",*od",
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",*tr", ",*<>", ",*>=", ",*>", 0, 0, 0, ",*ev"};
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static const char *const unit_cond_names[] = {
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static const char *const unit_cond_names[] =
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{
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"", ",swz", ",sbz", ",shz", ",sdc", ",swc", ",sbc", ",shc",
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",tr", ",nwz", ",nbz", ",nhz", ",ndc", ",nwc", ",nbc", ",nhc"
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};
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static const char *const unit_cond_64_names[] = {
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static const char *const unit_cond_64_names[] =
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{
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"", ",*swz", ",*sbz", ",*shz", ",*sdc", ",*swc", ",*sbc", ",*shc",
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",*tr", ",*nwz", ",*nbz", ",*nhz", ",*ndc", ",*nwc", ",*nbc", ",*nhc"
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};
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static const char *const shift_cond_names[] = {
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static const char *const shift_cond_names[] =
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{
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"", ",=", ",<", ",od", ",tr", ",<>", ",>=", ",ev"
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};
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static const char *const shift_cond_64_names[] = {
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static const char *const shift_cond_64_names[] =
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{
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"", ",*=", ",*<", ",*od", ",*tr", ",*<>", ",*>=", ",*ev"
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};
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static const char *const bb_cond_64_names[] = {
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static const char *const bb_cond_64_names[] =
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{
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",*<", ",*>="
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};
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static const char *const index_compl_names[] = {"", ",m", ",s", ",sm"};
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static const char *const short_ldst_compl_names[] = {"", ",ma", "", ",mb"};
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static const char *const short_bytes_compl_names[] = {
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static const char *const short_bytes_compl_names[] =
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{
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"", ",b,m", ",e", ",e,m"
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};
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static const char *const float_format_names[] = {",sgl", ",dbl", "", ",quad"};
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@ -146,51 +166,25 @@ static const char *const add_compl_names[] = { 0, "", ",l", ",tsv" };
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#define GET_COND(insn) (GET_FIELD ((insn), 16, 18) + \
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(GET_FIELD ((insn), 19, 19) ? 8 : 0))
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static void fput_reg PARAMS ((unsigned int, disassemble_info *));
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static void fput_fp_reg PARAMS ((unsigned int, disassemble_info *));
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static void fput_fp_reg_r PARAMS ((unsigned int, disassemble_info *));
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static void fput_creg PARAMS ((unsigned int, disassemble_info *));
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static void fput_const PARAMS ((unsigned int, disassemble_info *));
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static int extract_3 PARAMS ((unsigned int));
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static int extract_5_load PARAMS ((unsigned int));
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static int extract_5_store PARAMS ((unsigned int));
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static unsigned extract_5r_store PARAMS ((unsigned int));
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static unsigned extract_5R_store PARAMS ((unsigned int));
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static unsigned extract_10U_store PARAMS ((unsigned int));
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static unsigned extract_5Q_store PARAMS ((unsigned int));
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static int extract_11 PARAMS ((unsigned int));
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static int extract_14 PARAMS ((unsigned int));
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static int extract_16 PARAMS ((unsigned int));
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static int extract_21 PARAMS ((unsigned int));
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static int extract_12 PARAMS ((unsigned int));
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static int extract_17 PARAMS ((unsigned int));
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static int extract_22 PARAMS ((unsigned int));
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/* Utility function to print registers. Put these first, so gcc's function
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inlining can do its stuff. */
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#define fputs_filtered(STR,F) (*info->fprintf_func) (info->stream, "%s", STR)
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static void
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fput_reg (reg, info)
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unsigned reg;
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disassemble_info *info;
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fput_reg (unsigned reg, disassemble_info *info)
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{
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(*info->fprintf_func) (info->stream, reg ? reg_names[reg] : "r0");
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}
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static void
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fput_fp_reg (reg, info)
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unsigned reg;
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disassemble_info *info;
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fput_fp_reg (unsigned reg, disassemble_info *info)
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{
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(*info->fprintf_func) (info->stream, reg ? fp_reg_names[reg] : "fr0");
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}
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static void
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fput_fp_reg_r (reg, info)
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unsigned reg;
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disassemble_info *info;
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fput_fp_reg_r (unsigned reg, disassemble_info *info)
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{
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/* Special case floating point exception registers. */
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if (reg < 4)
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@ -201,9 +195,7 @@ fput_fp_reg_r (reg, info)
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}
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static void
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fput_creg (reg, info)
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unsigned reg;
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disassemble_info *info;
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fput_creg (unsigned reg, disassemble_info *info)
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{
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(*info->fprintf_func) (info->stream, control_reg[reg]);
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}
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@ -211,12 +203,10 @@ fput_creg (reg, info)
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/* Print constants with sign. */
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static void
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fput_const (num, info)
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unsigned num;
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disassemble_info *info;
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fput_const (unsigned num, disassemble_info *info)
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{
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if ((int)num < 0)
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(*info->fprintf_func) (info->stream, "-%x", -(int)num);
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if ((int) num < 0)
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(*info->fprintf_func) (info->stream, "-%x", - (int) num);
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else
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(*info->fprintf_func) (info->stream, "%x", num);
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}
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@ -226,81 +216,80 @@ fput_const (num, info)
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/* Extract a 3-bit space register number from a be, ble, mtsp or mfsp. */
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static int
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extract_3 (word)
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unsigned word;
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extract_3 (unsigned word)
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{
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return GET_FIELD (word, 18, 18) << 2 | GET_FIELD (word, 16, 17);
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}
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|
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static int
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extract_5_load (word)
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unsigned word;
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extract_5_load (unsigned word)
|
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{
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return low_sign_extend (word >> 16 & MASK_5, 5);
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}
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|
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/* Extract the immediate field from a st{bhw}s instruction. */
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static int
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extract_5_store (word)
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unsigned word;
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extract_5_store (unsigned word)
|
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{
|
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return low_sign_extend (word & MASK_5, 5);
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}
|
||||
|
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/* Extract the immediate field from a break instruction. */
|
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|
||||
static unsigned
|
||||
extract_5r_store (word)
|
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unsigned word;
|
||||
extract_5r_store (unsigned word)
|
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{
|
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return (word & MASK_5);
|
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}
|
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|
||||
/* Extract the immediate field from a {sr}sm instruction. */
|
||||
|
||||
static unsigned
|
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extract_5R_store (word)
|
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unsigned word;
|
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extract_5R_store (unsigned word)
|
||||
{
|
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return (word >> 16 & MASK_5);
|
||||
}
|
||||
|
||||
/* Extract the 10 bit immediate field from a {sr}sm instruction. */
|
||||
|
||||
static unsigned
|
||||
extract_10U_store (word)
|
||||
unsigned word;
|
||||
extract_10U_store (unsigned word)
|
||||
{
|
||||
return (word >> 16 & MASK_10);
|
||||
}
|
||||
|
||||
/* Extract the immediate field from a bb instruction. */
|
||||
|
||||
static unsigned
|
||||
extract_5Q_store (word)
|
||||
unsigned word;
|
||||
extract_5Q_store (unsigned word)
|
||||
{
|
||||
return (word >> 21 & MASK_5);
|
||||
}
|
||||
|
||||
/* Extract an 11 bit immediate field. */
|
||||
|
||||
static int
|
||||
extract_11 (word)
|
||||
unsigned word;
|
||||
extract_11 (unsigned word)
|
||||
{
|
||||
return low_sign_extend (word & MASK_11, 11);
|
||||
}
|
||||
|
||||
/* Extract a 14 bit immediate field. */
|
||||
|
||||
static int
|
||||
extract_14 (word)
|
||||
unsigned word;
|
||||
extract_14 (unsigned word)
|
||||
{
|
||||
return low_sign_extend (word & MASK_14, 14);
|
||||
}
|
||||
|
||||
/* Extract a 16 bit immediate field (PA2.0 wide only). */
|
||||
|
||||
static int
|
||||
extract_16 (word)
|
||||
unsigned word;
|
||||
extract_16 (unsigned word)
|
||||
{
|
||||
int m15, m0, m1;
|
||||
|
||||
m0 = GET_BIT (word, 16);
|
||||
m1 = GET_BIT (word, 17);
|
||||
m15 = GET_BIT (word, 31);
|
||||
@ -312,8 +301,7 @@ extract_16 (word)
|
||||
/* Extract a 21 bit constant. */
|
||||
|
||||
static int
|
||||
extract_21 (word)
|
||||
unsigned word;
|
||||
extract_21 (unsigned word)
|
||||
{
|
||||
int val;
|
||||
|
||||
@ -334,43 +322,39 @@ extract_21 (word)
|
||||
/* Extract a 12 bit constant from branch instructions. */
|
||||
|
||||
static int
|
||||
extract_12 (word)
|
||||
unsigned word;
|
||||
extract_12 (unsigned word)
|
||||
{
|
||||
return sign_extend (GET_FIELD (word, 19, 28) |
|
||||
GET_FIELD (word, 29, 29) << 10 |
|
||||
(word & 0x1) << 11, 12) << 2;
|
||||
return sign_extend (GET_FIELD (word, 19, 28)
|
||||
| GET_FIELD (word, 29, 29) << 10
|
||||
| (word & 0x1) << 11, 12) << 2;
|
||||
}
|
||||
|
||||
/* Extract a 17 bit constant from branch instructions, returning the
|
||||
19 bit signed value. */
|
||||
|
||||
static int
|
||||
extract_17 (word)
|
||||
unsigned word;
|
||||
extract_17 (unsigned word)
|
||||
{
|
||||
return sign_extend (GET_FIELD (word, 19, 28) |
|
||||
GET_FIELD (word, 29, 29) << 10 |
|
||||
GET_FIELD (word, 11, 15) << 11 |
|
||||
(word & 0x1) << 16, 17) << 2;
|
||||
return sign_extend (GET_FIELD (word, 19, 28)
|
||||
| GET_FIELD (word, 29, 29) << 10
|
||||
| GET_FIELD (word, 11, 15) << 11
|
||||
| (word & 0x1) << 16, 17) << 2;
|
||||
}
|
||||
|
||||
static int
|
||||
extract_22 (word)
|
||||
unsigned word;
|
||||
extract_22 (unsigned word)
|
||||
{
|
||||
return sign_extend (GET_FIELD (word, 19, 28) |
|
||||
GET_FIELD (word, 29, 29) << 10 |
|
||||
GET_FIELD (word, 11, 15) << 11 |
|
||||
GET_FIELD (word, 6, 10) << 16 |
|
||||
(word & 0x1) << 21, 22) << 2;
|
||||
return sign_extend (GET_FIELD (word, 19, 28)
|
||||
| GET_FIELD (word, 29, 29) << 10
|
||||
| GET_FIELD (word, 11, 15) << 11
|
||||
| GET_FIELD (word, 6, 10) << 16
|
||||
| (word & 0x1) << 21, 22) << 2;
|
||||
}
|
||||
|
||||
/* Print one instruction. */
|
||||
|
||||
int
|
||||
print_insn_hppa (memaddr, info)
|
||||
bfd_vma memaddr;
|
||||
disassemble_info *info;
|
||||
print_insn_hppa (bfd_vma memaddr, disassemble_info *info)
|
||||
{
|
||||
bfd_byte buffer[4];
|
||||
unsigned int insn, i;
|
||||
@ -390,9 +374,10 @@ print_insn_hppa (memaddr, info)
|
||||
for (i = 0; i < NUMOPCODES; ++i)
|
||||
{
|
||||
const struct pa_opcode *opcode = &pa_opcodes[i];
|
||||
|
||||
if ((insn & opcode->mask) == opcode->match)
|
||||
{
|
||||
register const char *s;
|
||||
const char *s;
|
||||
#ifndef BFD64
|
||||
if (opcode->arch == pa20w)
|
||||
continue;
|
||||
@ -789,10 +774,10 @@ print_insn_hppa (memaddr, info)
|
||||
float_comp_names[GET_FIELD (insn, 27, 31)]);
|
||||
break;
|
||||
|
||||
/* these four conditions are for the set of instructions
|
||||
/* These four conditions are for the set of instructions
|
||||
which distinguish true/false conditions by opcode
|
||||
rather than by the 'f' bit (sigh): comb, comib,
|
||||
addb, addib */
|
||||
addb, addib. */
|
||||
case 't':
|
||||
fputs_filtered
|
||||
(compare_cond_names[GET_FIELD (insn, 16, 18)], info);
|
||||
@ -1070,8 +1055,8 @@ print_insn_hppa (memaddr, info)
|
||||
GET_FIELD (insn, 23, 25));
|
||||
break;
|
||||
case 'F':
|
||||
/* if no destination completer and not before a completer
|
||||
for fcmp, need a space here */
|
||||
/* If no destination completer and not before a completer
|
||||
for fcmp, need a space here. */
|
||||
if (s[1] == 'G' || s[1] == '?')
|
||||
fputs_filtered
|
||||
(float_format_names[GET_FIELD (insn, 19, 20)], info);
|
||||
@ -1094,8 +1079,8 @@ print_insn_hppa (memaddr, info)
|
||||
float_format_names[1]);
|
||||
break;
|
||||
case 'I':
|
||||
/* if no destination completer and not before a completer
|
||||
for fcmp, need a space here */
|
||||
/* If no destination completer and not before a completer
|
||||
for fcmp, need a space here. */
|
||||
if (s[1] == '?')
|
||||
fputs_filtered
|
||||
(float_format_names[GET_FIELD (insn, 20, 20)], info);
|
||||
@ -1171,6 +1156,7 @@ print_insn_hppa (memaddr, info)
|
||||
const char * const * source = float_format_names;
|
||||
const char * const * dest = float_format_names;
|
||||
char *t = "";
|
||||
|
||||
if (sub == 4)
|
||||
{
|
||||
fputs_filtered (",UND ", info);
|
||||
@ -1212,22 +1198,18 @@ print_insn_hppa (memaddr, info)
|
||||
{
|
||||
int cond = GET_FIELD (insn, 27, 31);
|
||||
|
||||
if (cond == 0)
|
||||
fputs_filtered (" ", info);
|
||||
else if (cond == 1)
|
||||
fputs_filtered ("acc ", info);
|
||||
else if (cond == 2)
|
||||
fputs_filtered ("rej ", info);
|
||||
else if (cond == 5)
|
||||
fputs_filtered ("acc8 ", info);
|
||||
else if (cond == 6)
|
||||
fputs_filtered ("rej8 ", info);
|
||||
else if (cond == 9)
|
||||
fputs_filtered ("acc6 ", info);
|
||||
else if (cond == 13)
|
||||
fputs_filtered ("acc4 ", info);
|
||||
else if (cond == 17)
|
||||
fputs_filtered ("acc2 ", info);
|
||||
switch (cond)
|
||||
{
|
||||
case 0: fputs_filtered (" ", info); break;
|
||||
case 1: fputs_filtered ("acc ", info); break;
|
||||
case 2: fputs_filtered ("rej ", info); break;
|
||||
case 5: fputs_filtered ("acc8 ", info); break;
|
||||
case 6: fputs_filtered ("rej8 ", info); break;
|
||||
case 9: fputs_filtered ("acc6 ", info); break;
|
||||
case 13: fputs_filtered ("acc4 ", info); break;
|
||||
case 17: fputs_filtered ("acc2 ", info); break;
|
||||
default: break;
|
||||
}
|
||||
break;
|
||||
}
|
||||
|
||||
@ -1243,9 +1225,9 @@ print_insn_hppa (memaddr, info)
|
||||
break;
|
||||
}
|
||||
}
|
||||
return sizeof(insn);
|
||||
return sizeof (insn);
|
||||
}
|
||||
}
|
||||
(*info->fprintf_func) (info->stream, "#%8x", insn);
|
||||
return sizeof(insn);
|
||||
return sizeof (insn);
|
||||
}
|
||||
|
||||
Reference in New Issue
Block a user