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Add support for arm v5 architectures.

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This commit is contained in:
Nick Clifton
1999-07-05 07:28:24 +00:00
parent 752149a058
commit 478d07d67c
5 changed files with 32 additions and 7 deletions
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9
bfd/ChangeLog
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@ -1,5 +1,14 @@
1999-07-05 Nick Clifton <nickc@cygnus.com> 1999-07-05 Nick Clifton <nickc@cygnus.com>
* coffcode.h (coff_set_arch_mach_hook): Recognise arm 5
architectures.
(coff_set_flags): Recognise arm 5 architectures.
* cpu-arm.c: Add support for strongarm and arm9 cpus.
Add support for armv5 architecture.
* archures.c: Add bfd_mach_arm_5 and bfd_mach_arm_5T.
* reloc.c: Add new, assembler only, ARM reloc: * reloc.c: Add new, assembler only, ARM reloc:
BFD_RELOC_ARM_ADRL_IMMEDIATE. BFD_RELOC_ARM_ADRL_IMMEDIATE.

6
bfd/archures.c
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@ -162,11 +162,13 @@ DESCRIPTION
.#define bfd_mach_alpha_ev6 0x30 .#define bfd_mach_alpha_ev6 0x30
. bfd_arch_arm, {* Advanced Risc Machines ARM *} . bfd_arch_arm, {* Advanced Risc Machines ARM *}
.#define bfd_mach_arm_2 1 .#define bfd_mach_arm_2 1
.#define bfd_mach_arm_2a 2 .#define bfd_mach_arm_2a 2
.#define bfd_mach_arm_3 3 .#define bfd_mach_arm_3 3
.#define bfd_mach_arm_3M 4 .#define bfd_mach_arm_3M 4
.#define bfd_mach_arm_4 5 .#define bfd_mach_arm_4 5
.#define bfd_mach_arm_4T 6 .#define bfd_mach_arm_4T 6
.#define bfd_mach_arm_5 7
.#define bfd_mach_arm_5T 8
. bfd_arch_ns32k, {* National Semiconductors ns32000 *} . bfd_arch_ns32k, {* National Semiconductors ns32000 *}
. bfd_arch_w65, {* WDC 65816 *} . bfd_arch_w65, {* WDC 65816 *}
. bfd_arch_tic30, {* Texas Instruments TMS320C30 *} . bfd_arch_tic30, {* Texas Instruments TMS320C30 *}

6
bfd/bfd-in2.h
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@ -1316,11 +1316,13 @@ enum bfd_architecture
#define bfd_mach_alpha_ev6 0x30 #define bfd_mach_alpha_ev6 0x30
bfd_arch_arm, /* Advanced Risc Machines ARM */ bfd_arch_arm, /* Advanced Risc Machines ARM */
#define bfd_mach_arm_2 1 #define bfd_mach_arm_2 1
#define bfd_mach_arm_2a 2 #define bfd_mach_arm_2a 2
#define bfd_mach_arm_3 3 #define bfd_mach_arm_3 3
#define bfd_mach_arm_3M 4 #define bfd_mach_arm_3M 4
#define bfd_mach_arm_4 5 #define bfd_mach_arm_4 5
#define bfd_mach_arm_4T 6 #define bfd_mach_arm_4T 6
#define bfd_mach_arm_5 7
#define bfd_mach_arm_5T 8
bfd_arch_ns32k, /* National Semiconductors ns32000 */ bfd_arch_ns32k, /* National Semiconductors ns32000 */
bfd_arch_w65, /* WDC 65816 */ bfd_arch_w65, /* WDC 65816 */
bfd_arch_tic30, /* Texas Instruments TMS320C30 */ bfd_arch_tic30, /* Texas Instruments TMS320C30 */

3
bfd/coffcode.h
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@ -1429,6 +1429,7 @@ coff_set_arch_mach_hook (abfd, filehdr)
case F_ARM_3M: machine = bfd_mach_arm_3M; break; case F_ARM_3M: machine = bfd_mach_arm_3M; break;
case F_ARM_4: machine = bfd_mach_arm_4; break; case F_ARM_4: machine = bfd_mach_arm_4; break;
case F_ARM_4T: machine = bfd_mach_arm_4T; break; case F_ARM_4T: machine = bfd_mach_arm_4T; break;
case F_ARM_5: machine = bfd_mach_arm_5; break;
} }
break; break;
#endif #endif
@ -2067,6 +2068,8 @@ coff_set_flags (abfd, magicp, flagsp)
case bfd_mach_arm_3M: * flagsp |= F_ARM_3M; break; case bfd_mach_arm_3M: * flagsp |= F_ARM_3M; break;
case bfd_mach_arm_4: * flagsp |= F_ARM_4; break; case bfd_mach_arm_4: * flagsp |= F_ARM_4; break;
case bfd_mach_arm_4T: * flagsp |= F_ARM_4T; break; case bfd_mach_arm_4T: * flagsp |= F_ARM_4T; break;
case bfd_mach_arm_5: * flagsp |= F_ARM_5; break;
case bfd_mach_arm_5T: * flagsp |= F_ARM_5; break; /* XXX - we do not have an F_ARM_5T */
} }
return true; return true;
#endif #endif

15
bfd/cpu-arm.c
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@ -1,5 +1,5 @@
/* BFD support for the ARM processor /* BFD support for the ARM processor
Copyright 1994, 95, 1997 Free Software Foundation, Inc. Copyright 1994, 95, 97, 1999 Free Software Foundation, Inc.
Contributed by Richard Earnshaw (rwe@pegasus.esprit.ec.org) Contributed by Richard Earnshaw (rwe@pegasus.esprit.ec.org)
This file is part of BFD, the Binary File Descriptor library. This file is part of BFD, the Binary File Descriptor library.
@ -82,10 +82,17 @@ processors[] =
{ bfd_mach_arm_3, "arm7di" }, { bfd_mach_arm_3, "arm7di" },
{ bfd_mach_arm_3M, "arm7dm" }, { bfd_mach_arm_3M, "arm7dm" },
{ bfd_mach_arm_3M, "arm7dmi" }, { bfd_mach_arm_3M, "arm7dmi" },
{ bfd_mach_arm_4T, "arm7tdmi" },
{ bfd_mach_arm_4, "arm8" }, { bfd_mach_arm_4, "arm8" },
{ bfd_mach_arm_4, "arm810" }, { bfd_mach_arm_4, "arm810" },
{ bfd_mach_arm_4, "arm9" },
{ bfd_mach_arm_4, "arm920" },
{ bfd_mach_arm_4T, "arm920t" },
{ bfd_mach_arm_4T, "arm9tdmi" },
{ bfd_mach_arm_4, "sa1" }, { bfd_mach_arm_4, "sa1" },
{ bfd_mach_arm_4T, "arm7tdmi" } { bfd_mach_arm_4, "strongarm"},
{ bfd_mach_arm_4, "strongarm110" },
{ bfd_mach_arm_4, "strongarm1100" },
}; };
static boolean static boolean
@ -127,7 +134,9 @@ static const bfd_arch_info_type arch_info_struct[] =
N( bfd_mach_arm_3, "armv3", false, & arch_info_struct[3] ), N( bfd_mach_arm_3, "armv3", false, & arch_info_struct[3] ),
N( bfd_mach_arm_3M, "armv3m", false, & arch_info_struct[4] ), N( bfd_mach_arm_3M, "armv3m", false, & arch_info_struct[4] ),
N( bfd_mach_arm_4, "armv4", false, & arch_info_struct[5] ), N( bfd_mach_arm_4, "armv4", false, & arch_info_struct[5] ),
N( bfd_mach_arm_4T, "armv4t", false, NULL ) N( bfd_mach_arm_4T, "armv4t", false, & arch_info_struct[6] ),
N( bfd_mach_arm_5, "armv5", false, & arch_info_struct[7] ),
N( bfd_mach_arm_5T, "armv5t", false, NULL )
}; };
const bfd_arch_info_type bfd_arm_arch = const bfd_arch_info_type bfd_arm_arch =