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* config/tc-i386.h (RegMMX): Define.
* config/tc-i386.c (pi): Check for all register types. (type_names): Add RegMMX. (md_assemble): Handle RegMMX.
This commit is contained in:
@ -1,3 +1,22 @@
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Mon May 5 17:16:55 1997 Ian Lance Taylor <ian@cygnus.com>
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* config/tc-i386.h (RegMMX): Define.
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* config/tc-i386.c (pi): Check for all register types.
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(type_names): Add RegMMX.
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(md_assemble): Handle RegMMX.
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Wed Apr 30 12:47:00 1997 Manfred Hollstein <manfred@s-direktnet.de>
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* config/obj-coff.c (c_section_symbol): Clear the LOCAL bit #ifdef
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TE_DELTA.
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Tue Apr 29 20:23:10 1997 Jim Wilson <wilson@cygnus.com>
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* config/tc-mips.c (nopic_need_relax): Add new parameter
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before_relaxing. Use it when testing ecoff_extern_size.
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(load_address, macro, md_estimate_size_before_relax): Fix all
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callers.
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Tue Apr 29 19:54:36 1997 Richard Henderson <rth@tamu.edu>
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Tue Apr 29 19:54:36 1997 Richard Henderson <rth@tamu.edu>
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* config/obj-elf.c (elf_pseudo_table): Add "subsection".
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* config/obj-elf.c (elf_pseudo_table): Add "subsection".
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@ -638,7 +638,7 @@ pi (line, x)
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fprintf (stdout, " #%d: ", i + 1);
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fprintf (stdout, " #%d: ", i + 1);
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pt (x->types[i]);
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pt (x->types[i]);
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fprintf (stdout, "\n");
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fprintf (stdout, "\n");
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if (x->types[i] & Reg)
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if (x->types[i] & (Reg | SReg2 | SReg3 | Control | Debug | Test))
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fprintf (stdout, "%s\n", x->regs[i]->reg_name);
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fprintf (stdout, "%s\n", x->regs[i]->reg_name);
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if (x->types[i] & Imm)
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if (x->types[i] & Imm)
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pe (x->imms[i]);
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pe (x->imms[i]);
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@ -737,6 +737,7 @@ type_names[] =
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{ FloatReg, "FReg" },
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{ FloatReg, "FReg" },
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{ FloatAcc, "FAcc" },
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{ FloatAcc, "FAcc" },
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{ JumpAbsolute, "Jump Absolute" },
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{ JumpAbsolute, "Jump Absolute" },
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{ RegMMX, "rMMX" },
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{ 0, "" }
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{ 0, "" }
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};
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};
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@ -789,14 +790,6 @@ reloc (size, pcrel, other)
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pcrel ? "pc-relative " : "");
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pcrel ? "pc-relative " : "");
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return BFD_RELOC_NONE;
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return BFD_RELOC_NONE;
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}
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}
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#else
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#define reloc(SIZE,PCREL,OTHER) 0
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#define BFD_RELOC_32 0
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#define BFD_RELOC_32_PCREL 0
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#define BFD_RELOC_386_PLT32 0
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#define BFD_RELOC_386_GOT32 0
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#define BFD_RELOC_386_GOTOFF 0
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#endif
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/*
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/*
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* Here we decide which fixups can be adjusted to make them relative to
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* Here we decide which fixups can be adjusted to make them relative to
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@ -812,20 +805,24 @@ tc_i386_fix_adjustable(fixP)
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/* Prevent all adjustments to global symbols. */
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/* Prevent all adjustments to global symbols. */
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if (S_IS_EXTERN (fixP->fx_addsy))
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if (S_IS_EXTERN (fixP->fx_addsy))
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return 0;
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return 0;
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#ifdef BFD_ASSEMBLER
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if (S_IS_WEAK (fixP->fx_addsy))
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if (S_IS_WEAK (fixP->fx_addsy))
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return 0;
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return 0;
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#endif /* BFD_ASSEMBLER */
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#endif /* ! defined (OBJ_AOUT) */
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#endif /* ! defined (OBJ_AOUT) */
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#ifdef BFD_ASSEMBLER
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/* adjust_reloc_syms doesn't know about the GOT */
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/* adjust_reloc_syms doesn't know about the GOT */
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if (fixP->fx_r_type == BFD_RELOC_386_GOTOFF
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if (fixP->fx_r_type == BFD_RELOC_386_GOTOFF
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|| fixP->fx_r_type == BFD_RELOC_386_PLT32
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|| fixP->fx_r_type == BFD_RELOC_386_PLT32
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|| fixP->fx_r_type == BFD_RELOC_386_GOT32)
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|| fixP->fx_r_type == BFD_RELOC_386_GOT32)
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return 0;
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return 0;
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#endif
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return 1;
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return 1;
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}
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}
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#else
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#define reloc(SIZE,PCREL,OTHER) 0
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#define BFD_RELOC_32 0
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#define BFD_RELOC_32_PCREL 0
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#define BFD_RELOC_386_PLT32 0
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#define BFD_RELOC_386_GOT32 0
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#define BFD_RELOC_386_GOTOFF 0
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#endif
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/* This is the guts of the machine-dependent assembler. LINE points to a
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/* This is the guts of the machine-dependent assembler. LINE points to a
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machine dependent instruction. This function is supposed to emit
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machine dependent instruction. This function is supposed to emit
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@ -1419,14 +1416,23 @@ md_assemble (line)
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if (i.reg_operands == 2)
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if (i.reg_operands == 2)
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{
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{
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unsigned int source, dest;
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unsigned int source, dest;
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source = (i.types[0] & (Reg | SReg2 | SReg3 | Control | Debug | Test)) ? 0 : 1;
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source = ((i.types[0]
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& (Reg
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| SReg2
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| SReg3
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| Control
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| Debug
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| Test
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| RegMMX))
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? 0 : 1);
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dest = source + 1;
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dest = source + 1;
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i.rm.mode = 3;
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i.rm.mode = 3;
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/* We must be careful to make sure that all
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/* We must be careful to make sure that all
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segment/control/test/debug registers go into the i.rm.reg
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segment/control/test/debug/MMX registers go into
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field (despite the whether they are source or destination
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the i.rm.reg field (despite the whether they are
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operands). */
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source or destination operands). */
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if (i.regs[dest]->reg_type & (SReg2 | SReg3 | Control | Debug | Test))
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if (i.regs[dest]->reg_type
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& (SReg2 | SReg3 | Control | Debug | Test | RegMMX))
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{
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{
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i.rm.reg = i.regs[dest]->reg_num;
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i.rm.reg = i.regs[dest]->reg_num;
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i.rm.regmem = i.regs[source]->reg_num;
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i.rm.regmem = i.regs[source]->reg_num;
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@ -1554,15 +1560,23 @@ md_assemble (line)
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}
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}
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}
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}
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/* Fill in i.rm.reg or i.rm.regmem field with register operand
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/* Fill in i.rm.reg or i.rm.regmem field with register
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(if any) based on t->extension_opcode. Again, we must be
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operand (if any) based on
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careful to make sure that segment/control/debug/test
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t->extension_opcode. Again, we must be careful to
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make sure that segment/control/debug/test/MMX
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registers are coded into the i.rm.reg field. */
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registers are coded into the i.rm.reg field. */
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if (i.reg_operands)
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if (i.reg_operands)
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{
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{
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unsigned int op =
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unsigned int op =
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(i.types[0] & (Reg | SReg2 | SReg3 | Control | Debug | Test)) ? 0 :
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((i.types[0]
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(i.types[1] & (Reg | SReg2 | SReg3 | Control | Debug | Test)) ? 1 : 2;
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& (Reg | SReg2 | SReg3 | Control | Debug
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| Test | RegMMX))
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? 0
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: ((i.types[1]
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& (Reg | SReg2 | SReg3 | Control | Debug
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| Test | RegMMX))
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? 1
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: 2));
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/* If there is an extension opcode to put here, the
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/* If there is an extension opcode to put here, the
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register number must be put into the regmem field. */
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register number must be put into the regmem field. */
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if (t->extension_opcode != None)
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if (t->extension_opcode != None)
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