espressif/binutils-gdb
1
0
Fork 0
mirror of https://github.com/espressif/binutils-gdb.git synced 2025-06-19 00:59:15 +08:00
Code Issues Packages Projects Releases Wiki Activity

[MIPS] Rename COPROC related macros

Browse Source 
gas/

	* config/tc-mips.c: Rename INSN_LOAD_COPROC_DELAY to INSN_LOAD_COPROC
	and INSN_COPROC_MOVE_DELAY to INSN_COPROC_MOVE throughout.

include/opcode/

	* mips.h (INSN_LOAD_COPROC_DELAY): Rename to...
	(INSN_LOAD_COPROC): New define.
	(INSN_COPROC_MOVE_DELAY): Rename to...
	(INSN_COPROC_MOVE): New define.

opcodes/

	* micromips-opc.c (COD): Rename throughout to...
	(CM): New define, update to use INSN_COPROC_MOVE.
	(LCD): Rename throughout to...
	(LC): New define, update to use INSN_LOAD_COPROC.
	* mips-opc.c: Likewise.
This commit is contained in:
Matthew Fortune
2014-07-29 13:18:07 +01:00
parent ea99bdb59d
commit 43885403ed
7 changed files with 166 additions and 146 deletions
Download Patch File Download Diff File Expand all files Collapse all files

8
include/opcode/mips.h
View File

@ -973,16 +973,16 @@ struct mips_opcode
#define INSN_COP 0x00000400
/* Instruction loads value from memory. */
#define INSN_LOAD_MEMORY 0x00000800
/* Instruction loads value from coprocessor, requiring delay. */
#define INSN_LOAD_COPROC_DELAY 0x00001000
/* Instruction loads value from coprocessor, (may require delay). */
#define INSN_LOAD_COPROC 0x00001000
/* Instruction has unconditional branch delay slot. */
#define INSN_UNCOND_BRANCH_DELAY 0x00002000
/* Instruction has conditional branch delay slot. */
#define INSN_COND_BRANCH_DELAY 0x00004000
/* Conditional branch likely: if branch not taken, insn nullified. */
#define INSN_COND_BRANCH_LIKELY 0x00008000
/* Moves to coprocessor register, requiring delay. */
#define INSN_COPROC_MOVE_DELAY 0x00010000
/* Moves to coprocessor register, (may require delay). */
#define INSN_COPROC_MOVE 0x00010000
/* Loads coprocessor register from memory, requiring delay. */
#define INSN_COPROC_MEMORY_DELAY 0x00020000
/* Reads the HI register. */