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RISC-V: Allow instruction require more than one extension

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2018-08-29  Kito Cheng  <kito@andestech.com>

gas/
	* config/tc-riscv.c (riscv_subset_supports): New argument:
	xlen_required.
	(riscv_multi_subset_supports): New function, able to check more
	than one extension.
	(riscv_ip): Use riscv_multi_subset_supports instead of
	riscv_subset_supports.
	(riscv_set_arch): Update call-site for riscv_subset_supports.
	(riscv_after_parse_args): Likewise.

include/
	*opcode/riscv.h (MAX_SUBSET_NUM): New.
	(riscv_opcode): Add xlen_requirement field and change type of
	subset.

opcodes/
	* riscv-dis.c (riscv_disassemble_insn): Check XLEN by
	riscv_opcode.xlen_requirement.
	* riscv-opc.c (riscv_opcodes): Update for struct change.
This commit is contained in:
Jim Wilson
2018-08-30 13:23:12 -07:00
parent a869991180
commit 43135d3b15
7 changed files with 666 additions and 627 deletions
Download Patch File Download Diff File Expand all files Collapse all files

10
include/opcode/riscv.h
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@ -281,14 +281,20 @@ static const char * const riscv_pred_succ[16] =
#define EXTRACT_OPERAND(FIELD, INSN) \
EXTRACT_BITS ((INSN), OP_MASK_##FIELD, OP_SH_##FIELD)
/* The maximal number of subset can be required. */
#define MAX_SUBSET_NUM 4
/* This structure holds information for a particular instruction. */
struct riscv_opcode
{
/* The name of the instruction. */
const char *name;
/* The ISA subset name (I, M, A, F, D, Xextension). */
const char *subset;
/* The requirement of xlen for the instruction, 0 if no requirement. */
int xlen_requirement;
/* An array of ISA subset name (I, M, A, F, D, Xextension), must ended
with a NULL pointer sential. */
const char *subset[MAX_SUBSET_NUM];
/* A string describing the arguments for this instruction. */
const char *args;
/* The basic opcode for the instruction. When assembling, this