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i386 PIII SIMD support, remove ReverseRegRegmem kludge
tidy a few things in i386 intel mode disassembly
This commit is contained in:
Alan Modra
1999-05-13 06:00:13 +00:00
parent 578ec497b6
commit 3f4438abfd
1 changed files with 28 additions and 39 deletions
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67
gas/config/tc-i386.c
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@ -740,7 +740,7 @@ pi (line, x)
pt (x->types[i]); pt (x->types[i]);
fprintf (stdout, "\n"); fprintf (stdout, "\n");
if (x->types[i] if (x->types[i]
& (Reg | SReg2 | SReg3 | Control | Debug | Test | RegMMX)) & (Reg | SReg2 | SReg3 | Control | Debug | Test | RegMMX | RegXMM))
fprintf (stdout, "%s\n", x->regs[i]->reg_name); fprintf (stdout, "%s\n", x->regs[i]->reg_name);
if (x->types[i] & Imm) if (x->types[i] & Imm)
pe (x->imms[i]); pe (x->imms[i]);
@ -835,6 +835,7 @@ type_names[] =
{ Acc, "Acc" }, { Acc, "Acc" },
{ JumpAbsolute, "Jump Absolute" }, { JumpAbsolute, "Jump Absolute" },
{ RegMMX, "rMMX" }, { RegMMX, "rMMX" },
{ RegXMM, "rXMM" },
{ EsSeg, "es" }, { EsSeg, "es" },
{ 0, "" } { 0, "" }
}; };
@ -1552,8 +1553,10 @@ md_assemble (line)
continue; continue;
} }
/* Any other register is bad */ /* Any other register is bad */
if (i.types[op] & (Reg | RegMMX | Control | Debug | Test if (i.types[op] & (Reg | RegMMX | RegXMM
| FloatReg | FloatAcc | SReg2 | SReg3)) | SReg2 | SReg3
| Control | Debug | Test
| FloatReg | FloatAcc))
{ {
as_bad (_("`%%%s' not allowed with `%s%c'"), as_bad (_("`%%%s' not allowed with `%s%c'"),
i.regs[op]->reg_name, i.regs[op]->reg_name,
@ -1740,12 +1743,12 @@ md_assemble (line)
} }
} }
if (i.tm.base_opcode == AMD_3DNOW_OPCODE) if (i.tm.opcode_modifier & ImmExt)
{ {
/* These AMD specific instructions have an opcode suffix which /* These AMD 3DNow! and Intel Katmai New Instructions have an
is coded in the same place as an 8-bit immediate field opcode suffix which is coded in the same place as an 8-bit
would be. Here we fake an 8-bit immediate operand from the immediate field would be. Here we fake an 8-bit immediate
opcode suffix stored in tm.extension_opcode. */ operand from the opcode suffix stored in tm.extension_opcode. */
expressionS *exp; expressionS *exp;
@ -1822,37 +1825,21 @@ md_assemble (line)
{ {
unsigned int source, dest; unsigned int source, dest;
source = ((i.types[0] source = ((i.types[0]
& (Reg & (Reg | RegMMX | RegXMM
| SReg2 | SReg2 | SReg3
| SReg3 | Control | Debug | Test))
| Control
| Debug
| Test
| RegMMX))
? 0 : 1); ? 0 : 1);
dest = source + 1; dest = source + 1;
/* Certain instructions expect the destination to be
in the i.rm.reg field. This is by far the
exceptional case. For these instructions, if the
source operand is a register, we must reverse the
i.rm.reg and i.rm.regmem fields. We accomplish
this by pretending that the two register operands
were given in the reverse order. */
if (i.tm.opcode_modifier & ReverseRegRegmem)
{
const reg_entry *tmp = i.regs[source];
i.regs[source] = i.regs[dest];
i.regs[dest] = tmp;
}
i.rm.mode = 3; i.rm.mode = 3;
/* We must be careful to make sure that all /* One of the register operands will be encoded in the
segment/control/test/debug/MMX registers go into i.tm.reg field, the other in the combined i.tm.mode
the i.rm.reg field (despite whether they are and i.tm.regmem fields. If no form of this
source or destination operands). */ instruction supports a memory destination operand,
if (i.regs[dest]->reg_type then we assume the source operand may sometimes be
& (SReg2 | SReg3 | Control | Debug | Test | RegMMX)) a memory operand and so we need to store the
destination in the i.rm.reg field. */
if ((i.tm.operand_types[dest] & AnyMem) == 0)
{ {
i.rm.reg = i.regs[dest]->reg_num; i.rm.reg = i.regs[dest]->reg_num;
i.rm.regmem = i.regs[source]->reg_num; i.rm.regmem = i.regs[source]->reg_num;
@ -1999,12 +1986,14 @@ md_assemble (line)
{ {
unsigned int op = unsigned int op =
((i.types[0] ((i.types[0]
& (Reg | SReg2 | SReg3 | Control | Debug & (Reg | RegMMX | RegXMM
| Test | RegMMX)) | SReg2 | SReg3
| Control | Debug | Test))
? 0 ? 0
: ((i.types[1] : ((i.types[1]
& (Reg | SReg2 | SReg3 | Control | Debug & (Reg | RegMMX | RegXMM
| Test | RegMMX)) | SReg2 | SReg3
| Control | Debug | Test))
? 1 ? 1
: 2)); : 2));
/* If there is an extension opcode to put here, the /* If there is an extension opcode to put here, the