Fix REL handling for MSP430

* elf32-msp430.c (msp430_final_link_relocate): Fix comments.  Fix
REL loads to match RELA stores.
This commit is contained in:
DJ Delorie
2015-06-25 17:20:15 -04:00
parent 946748d5ed
commit 3f3070745b
2 changed files with 28 additions and 17 deletions

View File

@ -1,3 +1,8 @@
2015-06-25 DJ Delorie <dj@redhat.com>
* elf32-msp430.c (msp430_final_link_relocate): Fix comments. Fix
REL loads to match RELA stores.
2015-06-25 H.J. Lu <hongjiu.lu@intel.com> 2015-06-25 H.J. Lu <hongjiu.lu@intel.com>
* elf.c (_bfd_elf_compute_section_file_positions): Don't * elf.c (_bfd_elf_compute_section_file_positions): Don't

View File

@ -845,14 +845,14 @@ msp430_final_link_relocate (reloc_howto_type * howto,
break; break;
case R_MSP430X_PCR20_EXT_ODST: case R_MSP430X_PCR20_EXT_ODST:
/* [0,4]+[48,16] = ---F ---- FFFF */ /* [0,4]+[48,16] = ---F ---- ---- FFFF */
contents += rel->r_offset; contents += rel->r_offset;
srel = (bfd_signed_vma) relocation; srel = (bfd_signed_vma) relocation;
if (is_rel_reloc) if (is_rel_reloc)
{ {
bfd_vma addend; bfd_vma addend;
addend = (bfd_get_16 (input_bfd, contents) & 0xf) << 16; addend = (bfd_get_16 (input_bfd, contents) & 0xf) << 16;
addend |= bfd_get_16 (input_bfd, contents+4); addend |= bfd_get_16 (input_bfd, contents + 6);
srel += addend; srel += addend;
} }
@ -868,14 +868,14 @@ msp430_final_link_relocate (reloc_howto_type * howto,
break; break;
case R_MSP430X_ABS20_EXT_SRC: case R_MSP430X_ABS20_EXT_SRC:
/* [7,4]+[32,16] = -78- FFFF */ /* [7,4]+[32,16] = -78- ---- FFFF */
contents += rel->r_offset; contents += rel->r_offset;
srel = (bfd_signed_vma) relocation; srel = (bfd_signed_vma) relocation;
if (is_rel_reloc) if (is_rel_reloc)
{ {
bfd_vma addend; bfd_vma addend;
addend = (bfd_get_16 (input_bfd, contents) & 0x0780) << 9; addend = (bfd_get_16 (input_bfd, contents) & 0x0780) << 9;
addend |= bfd_get_16 (input_bfd, contents+2); addend |= bfd_get_16 (input_bfd, contents + 4);
srel += addend; srel += addend;
} }
else else
@ -904,14 +904,14 @@ msp430_final_link_relocate (reloc_howto_type * howto,
break; break;
case R_MSP430X_PCR20_EXT_DST: case R_MSP430X_PCR20_EXT_DST:
/* [0,4]+[32,16] = ---F FFFF */ /* [0,4]+[32,16] = ---F ---- FFFF */
contents += rel->r_offset; contents += rel->r_offset;
srel = (bfd_signed_vma) relocation; srel = (bfd_signed_vma) relocation;
if (is_rel_reloc) if (is_rel_reloc)
{ {
bfd_vma addend; bfd_vma addend;
addend = (bfd_get_16 (input_bfd, contents) & 0xf) << 16; addend = (bfd_get_16 (input_bfd, contents) & 0xf) << 16;
addend |= bfd_get_16 (input_bfd, contents+2); addend |= bfd_get_16 (input_bfd, contents + 4);
srel += addend; srel += addend;
} }
else else
@ -927,14 +927,14 @@ msp430_final_link_relocate (reloc_howto_type * howto,
break; break;
case R_MSP430X_PCR20_EXT_SRC: case R_MSP430X_PCR20_EXT_SRC:
/* [7,4]+32,16] = -78- FFFF */ /* [7,4]+[32,16] = -78- ---- FFFF */
contents += rel->r_offset; contents += rel->r_offset;
srel = (bfd_signed_vma) relocation; srel = (bfd_signed_vma) relocation;
if (is_rel_reloc) if (is_rel_reloc)
{ {
bfd_vma addend; bfd_vma addend;
addend = ((bfd_get_16 (input_bfd, contents) & 0x0780) << 9); addend = ((bfd_get_16 (input_bfd, contents) & 0x0780) << 9);
addend |= bfd_get_16 (input_bfd, contents+2); addend |= bfd_get_16 (input_bfd, contents + 4);
srel += addend;; srel += addend;;
} }
else else
@ -961,10 +961,16 @@ msp430_final_link_relocate (reloc_howto_type * howto,
break; break;
case R_MSP430X_ABS20_EXT_DST: case R_MSP430X_ABS20_EXT_DST:
/* [0,4]+[32,16] = ---F ---- FFFF */
contents += rel->r_offset; contents += rel->r_offset;
srel = (bfd_signed_vma) relocation; srel = (bfd_signed_vma) relocation;
if (is_rel_reloc) if (is_rel_reloc)
srel += bfd_get_16 (input_bfd, contents) & 0xf; {
bfd_vma addend;
addend = (bfd_get_16 (input_bfd, contents) & 0xf) << 16;
addend |= bfd_get_16 (input_bfd, contents + 4);
srel += addend;
}
else else
srel += rel->r_addend; srel += rel->r_addend;
bfd_put_16 (input_bfd, (srel & 0xffff), contents + 4); bfd_put_16 (input_bfd, (srel & 0xffff), contents + 4);
@ -975,14 +981,14 @@ msp430_final_link_relocate (reloc_howto_type * howto,
break; break;
case R_MSP430X_ABS20_EXT_ODST: case R_MSP430X_ABS20_EXT_ODST:
/* [0,4]+[48,16] = ---F ---- FFFF */ /* [0,4]+[48,16] = ---F ---- ---- FFFF */
contents += rel->r_offset; contents += rel->r_offset;
srel = (bfd_signed_vma) relocation; srel = (bfd_signed_vma) relocation;
if (is_rel_reloc) if (is_rel_reloc)
{ {
bfd_vma addend; bfd_vma addend;
addend = (bfd_get_16 (input_bfd, contents) & 0xf) << 16; addend = (bfd_get_16 (input_bfd, contents) & 0xf) << 16;
addend |= bfd_get_16 (input_bfd, contents+4); addend |= bfd_get_16 (input_bfd, contents + 6);
srel += addend; srel += addend;
} }
else else
@ -995,7 +1001,7 @@ msp430_final_link_relocate (reloc_howto_type * howto,
break; break;
case R_MSP430X_ABS20_ADR_SRC: case R_MSP430X_ABS20_ADR_SRC:
/* [8,4]+[32,16] = -F-- FFFF */ /* [8,4]+[16,16] = -F-- FFFF */
contents += rel->r_offset; contents += rel->r_offset;
srel = (bfd_signed_vma) relocation; srel = (bfd_signed_vma) relocation;
if (is_rel_reloc) if (is_rel_reloc)
@ -1016,7 +1022,7 @@ msp430_final_link_relocate (reloc_howto_type * howto,
break; break;
case R_MSP430X_ABS20_ADR_DST: case R_MSP430X_ABS20_ADR_DST:
/* [0,4]+[32,16] = ---F FFFF */ /* [0,4]+[16,16] = ---F FFFF */
contents += rel->r_offset; contents += rel->r_offset;
srel = (bfd_signed_vma) relocation; srel = (bfd_signed_vma) relocation;
if (is_rel_reloc) if (is_rel_reloc)
@ -1058,7 +1064,7 @@ msp430_final_link_relocate (reloc_howto_type * howto,
break; break;
case R_MSP430X_PCR20_CALL: case R_MSP430X_PCR20_CALL:
/* [0,4]+[32,16] = ---F FFFF*/ /* [0,4]+[16,16] = ---F FFFF*/
contents += rel->r_offset; contents += rel->r_offset;
srel = (bfd_signed_vma) relocation; srel = (bfd_signed_vma) relocation;
if (is_rel_reloc) if (is_rel_reloc)