RISC-V: Scalar crypto instructions and operand set.

Add instructions in k-ext, some instruction in zbkb, zbkc is reuse from
zbb,zbc, we just change the class attribute to make them both support.
The 'aes64ks1i' and 'aes64ks2' instructions are present in both the Zknd
and Zkne extensions on rv64.  Add new operand letter 'y' to present 'bs'
symbol and 'Y' to present 'rnum' symbolc  for zkn instructions.  Also add
a new Entropy Source CSR define 'seed' located at address 0x015.

bfd/
	* elfxx-riscv.c (riscv_multi_subset_supports): Added support for
	crypto extension.
gas/
	*config/tc-riscv.c (enum riscv_csr_class): Added CSR_CLASS_ZKR.
	(riscv_csr_address): Checked for CSR_CLASS_ZKR.
	(validate_riscv_insn): Added y and Y for bs and rnum operands.
	(riscv_ip): Handle y and Y operands.
include/
	* opcode/riscv-opc.h: Added encodings of crypto instructions.
	Also defined new csr seed, which address is 0x15.
	* opcode/riscv.h: Defined OP_* and INSN_CLASS_* for crypto.
opcodes/
	* riscv-dis.c (print_insn_args): Recognized new y and Y operands.
	* riscv-opc.c (riscv_opcodes): Added crypto instructions.

include/opcode/riscv.h

@@ -261,6 +261,13 @@ static const char * const riscv_pred_succ[16] =
 #define OP_MASK_CFUNCT2		0x3
 #define OP_SH_CFUNCT2		5
 
+/* Scalar crypto fields. */
+
+#define OP_SH_BS        30
+#define OP_MASK_BS      3
+#define OP_SH_RNUM      20
+#define OP_MASK_RNUM    0xf
+
 /* ABI names for selected x-registers.  */
 
 #define X_RA 1
@@ -320,6 +327,17 @@ enum riscv_insn_class
   INSN_CLASS_ZBB,
   INSN_CLASS_ZBC,
   INSN_CLASS_ZBS,
+  INSN_CLASS_ZBKB,
+  INSN_CLASS_ZBKC,
+  INSN_CLASS_ZBKX,
+  INSN_CLASS_ZKND,
+  INSN_CLASS_ZKNE,
+  INSN_CLASS_ZKNH,
+  INSN_CLASS_ZKSED,
+  INSN_CLASS_ZKSH,
+  INSN_CLASS_ZBB_OR_ZBKB,
+  INSN_CLASS_ZBC_OR_ZBKC,
+  INSN_CLASS_ZKND_OR_ZKNE,
 };
 
 /* This structure holds information for a particular instruction.  */