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or1k: Avoid R_OR1K_GOT16 overflow failures in presence of R_OR1K_GOT_AHI16

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Now that we support R_OR1K_GOT_AHI16 we can relax the R_OR1K_GOT16
overflow validation check if the section has R_OR1K_GOT_AHI16.

We cannot simple disable R_OR1K_GOT16 overflow validation as there will
still be binaries that will have only R_OR1K_GOT16.  The
R_OR1K_GOT_AHI16 relocation will only be added by GCC when building with
the option -mcmodel=large.

This assumes that R_OR1K_GOT_AHI16 will come before R_OR1K_GOT16, which
is the code pattern that will be emitted by GCC.

bfd/ChangeLog:

	PR 21464
	* elf32-or1k.c (or1k_elf_relocate_section): Relax R_OR1K_GOT16
	overflow check if we have R_OR1K_GOT_AHI16 followed by
	R_OR1K_GOT16.
This commit is contained in:
Stafford Horne
2021-05-06 20:51:25 +09:00
parent 0b3e14c902
commit 3c3de29b04
2 changed files with 18 additions and 0 deletions
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7
bfd/ChangeLog
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@ -1,3 +1,10 @@
2021-05-06 Stafford Horne <shorne@gmail.com>
PR 21464
* elf32-or1k.c (or1k_elf_relocate_section): Relax R_OR1K_GOT16
overflow check if we have R_OR1K_GOT_AHI16 followed by
R_OR1K_GOT16.
2021-05-06 Stafford Horne <shorne@gmail.com> 2021-05-06 Stafford Horne <shorne@gmail.com>
PR 21464 PR 21464

11
bfd/elf32-or1k.c
View File

@ -1278,6 +1278,7 @@ or1k_elf_relocate_section (bfd *output_bfd,
asection *sgot, *splt; asection *sgot, *splt;
bfd_vma plt_base, got_base, got_sym_value; bfd_vma plt_base, got_base, got_sym_value;
bool ret_val = true; bool ret_val = true;
bool saw_gotha = false;
if (htab == NULL) if (htab == NULL)
return false; return false;
@ -1485,6 +1486,16 @@ or1k_elf_relocate_section (bfd *output_bfd,
|| r_type == R_OR1K_GOT_AHI16) || r_type == R_OR1K_GOT_AHI16)
relocation -= got_sym_value; relocation -= got_sym_value;
if (r_type == R_OR1K_GOT_AHI16)
saw_gotha = true;
/* If we have a R_OR1K_GOT16 followed by a R_OR1K_GOT_AHI16
relocation we assume the code is doing the right thing to avoid
overflows. Here we mask the lower 16-bit of the relocation to
avoid overflow validation failures. */
if (r_type == R_OR1K_GOT16 && saw_gotha)
relocation &= 0xffff;
/* Addend should be zero. */ /* Addend should be zero. */
if (rel->r_addend != 0) if (rel->r_addend != 0)
{ {