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FT32: support for FT32B processor - part 1

Browse Source 
FT32B is a new FT32 family member. It has a code
compression scheme, which requires the use of linker
relaxations. The change is quite large, so submission
is in several parts.

Part 1 adds a 15-bit instruction field, and CPU-specific functions for
the code compression that are used in binutils and GDB.

bfd/ChangeLog:

2017-10-12  James Bowman  <james.bowman@ftdichip.com>

	* bfd-in2.h: Regenerate.
	* libbfd.h: Regenerate.
	* elf32-ft32.c: Add HOWTO R_FT32_15.
	* reloc.c: Add BFD_RELOC_FT32_15.

gas/ChangeLog:

2017-10-12  James Bowman  <james.bowman@ftdichip.com>

	* config/tc-ft32.c (md_assemble): Replace FT32_FLD_K8 with
	K15.
	(md_apply_fix, tc_gen_reloc): Add BFD_RELOC_FT32_15.

include/ChangeLog:

2017-10-12  James Bowman  <james.bowman@ftdichip.com>

	* elf/ft32.h: Add R_FT32_15.
	* opcode/ft32.h: Replace FT32_FLD_K8 with K15.
	(ft32_shortcode, sc_compar, ft32_split_shortcode,
	ft32_merge_shortcode, ft32_merge_shortcode): New functions.

opcodes/ChangeLog:

2017-10-12  James Bowman  <james.bowman@ftdichip.com>

	* opcodes/ft32-dis.c (print_insn_ft32): Replace FT32_FLD_K8 with K15.
	* opcodes/ft32-opc.c (ft32_opc_info): Replace FT32_FLD_K8 with
	K15. Add jmpix pattern.

sim/ChangeLog:

2017-10-12  James Bowman  <james.bowman@ftdichip.com>

	* sim/ft32/interp.c (step_once): Replace FT32_FLD_K8 with K15.
This commit is contained in:
James Bowman
2017-10-12 18:37:40 -07:00
parent d268bbaff7
commit 3b4b0a629a
15 changed files with 503 additions and 35 deletions
Download Patch File Download Diff File Expand all files Collapse all files

4
sim/ChangeLog
View File

@ -1,3 +1,7 @@
2017-10-12 James Bowman <james.bowman@ftdichip.com>
* ft32/interp.c (step_once): Replace FT32_FLD_K8 with K15.
2017-10-12 James Bowman <james.bowman@ftdichip.com>
* MAINTAINERS (ft32): Add myself.

18
sim/ft32/interp.c
View File

@ -332,7 +332,7 @@ step_once (SIM_DESC sd)
uint32_t pa;
uint32_t aa;
uint32_t k16;
uint32_t k8;
uint32_t k15;
uint32_t al;
uint32_t r_1v;
uint32_t rimmv;
@ -372,7 +372,11 @@ step_once (SIM_DESC sd)
pa = (inst >> FT32_FLD_PA_BIT) & LSBS (FT32_FLD_PA_SIZ);
aa = (inst >> FT32_FLD_AA_BIT) & LSBS (FT32_FLD_AA_SIZ);
k16 = (inst >> FT32_FLD_K16_BIT) & LSBS (FT32_FLD_K16_SIZ);
k8 = nsigned (8, (inst >> FT32_FLD_K8_BIT) & LSBS (FT32_FLD_K8_SIZ));
k15 = (inst >> FT32_FLD_K15_BIT) & LSBS (FT32_FLD_K15_SIZ);
if (k15 & 0x80)
k15 ^= 0x7f00;
if (k15 & 0x4000)
k15 -= 0x8000;
al = (inst >> FT32_FLD_AL_BIT) & LSBS (FT32_FLD_AL_SIZ);
r_1v = cpu->state.regs[r_1];
@ -499,7 +503,7 @@ step_once (SIM_DESC sd)
break;
case FT32_PAT_LPMI:
cpu->state.regs[r_d] = ft32_read_item (sd, dw, cpu->state.regs[r_1] + k8);
cpu->state.regs[r_d] = ft32_read_item (sd, dw, cpu->state.regs[r_1] + k15);
cpu->state.cycles += 1;
break;
@ -508,7 +512,7 @@ step_once (SIM_DESC sd)
break;
case FT32_PAT_STI:
cpu_mem_write (sd, dw, cpu->state.regs[r_d] + k8, cpu->state.regs[r_1]);
cpu_mem_write (sd, dw, cpu->state.regs[r_d] + k15, cpu->state.regs[r_1]);
break;
case FT32_PAT_LDA:
@ -517,7 +521,7 @@ step_once (SIM_DESC sd)
break;
case FT32_PAT_LDI:
cpu->state.regs[r_d] = cpu_mem_read (sd, dw, cpu->state.regs[r_1] + k8);
cpu->state.regs[r_d] = cpu_mem_read (sd, dw, cpu->state.regs[r_1] + k15);
cpu->state.cycles += 1;
break;
@ -534,8 +538,8 @@ step_once (SIM_DESC sd)
case FT32_PAT_EXI:
{
uint32_t tmp;
tmp = cpu_mem_read (sd, dw, cpu->state.regs[r_1] + k8);
cpu_mem_write (sd, dw, cpu->state.regs[r_1] + k8, cpu->state.regs[r_d]);
tmp = cpu_mem_read (sd, dw, cpu->state.regs[r_1] + k15);
cpu_mem_write (sd, dw, cpu->state.regs[r_1] + k15, cpu->state.regs[r_d]);
cpu->state.regs[r_d] = tmp;
cpu->state.cycles += 1;
}