diff --git a/bfd/ChangeLog b/bfd/ChangeLog
index 1e4fe71eca8..4f54f36e2d8 100644
--- a/bfd/ChangeLog
+++ b/bfd/ChangeLog
@@ -1,3 +1,16 @@
+2008-11-28  Joshua Kinard  <kumba@gentoo.org>
+
+	* aoutx.h (NAME): Add case statements for bfd_mach_mips14000,
+	bfd_mach_mips16000.
+	* archures.c (bfd_architecture): Add .#defines for bfd_mach_mips14000,
+	bfd_mach_mips16000.
+	* bfd-in2.h: Regenerate.
+	* cpu-mips.c: Add enums I_mips14000, I_mips16000.
+	(arch_info_struct): Add refs to R14000, R16000.
+	* elfxx-mips.c (mips_set_isa_flags): Handle bfd_mach_mips14000,
+	bfd_mach_mips16000.
+	(mips_mach_extensions): Map R14000, R16000 to R10000.
+
 2008-11-27   M R Swami Reddy <MR.Swami.Reddy@nsc.com>
 
 	* Add PIC support for CR16 target.
diff --git a/bfd/aoutx.h b/bfd/aoutx.h
index b469b77c626..e808716d640 100644
--- a/bfd/aoutx.h
+++ b/bfd/aoutx.h
@@ -786,6 +786,8 @@ NAME (aout, machine_type) (enum bfd_architecture arch,
 	case bfd_mach_mips9000:
 	case bfd_mach_mips10000:
 	case bfd_mach_mips12000:
+	case bfd_mach_mips14000:
+	case bfd_mach_mips16000:
 	case bfd_mach_mips16:
 	case bfd_mach_mipsisa32:
 	case bfd_mach_mipsisa32r2:
diff --git a/bfd/archures.c b/bfd/archures.c
index aa494999120..1156e094623 100644
--- a/bfd/archures.c
+++ b/bfd/archures.c
@@ -167,6 +167,8 @@ DESCRIPTION
 .#define bfd_mach_mips9000		9000
 .#define bfd_mach_mips10000		10000
 .#define bfd_mach_mips12000		12000
+.#define bfd_mach_mips14000		14000
+.#define bfd_mach_mips16000		16000
 .#define bfd_mach_mips16		16
 .#define bfd_mach_mips5                 5
 .#define bfd_mach_mips_loongson_2e      3001
diff --git a/bfd/bfd-in2.h b/bfd/bfd-in2.h
index 226bbf07eb2..917b8bc205c 100644
--- a/bfd/bfd-in2.h
+++ b/bfd/bfd-in2.h
@@ -1793,6 +1793,8 @@ enum bfd_architecture
 #define bfd_mach_mips9000              9000
 #define bfd_mach_mips10000             10000
 #define bfd_mach_mips12000             12000
+#define bfd_mach_mips14000             14000
+#define bfd_mach_mips16000             16000
 #define bfd_mach_mips16                16
 #define bfd_mach_mips5                 5
 #define bfd_mach_mips_loongson_2e      3001
diff --git a/bfd/cpu-mips.c b/bfd/cpu-mips.c
index 07f966b88da..1102467a576 100644
--- a/bfd/cpu-mips.c
+++ b/bfd/cpu-mips.c
@@ -80,6 +80,8 @@ enum
   I_mips9000,
   I_mips10000,
   I_mips12000,
+  I_mips14000,
+  I_mips16000,
   I_mips16,
   I_mips5,
   I_mipsisa32,
@@ -116,6 +118,8 @@ static const bfd_arch_info_type arch_info_struct[] =
   N (64, 64, bfd_mach_mips9000, "mips:9000",      FALSE, NN(I_mips9000)),
   N (64, 64, bfd_mach_mips10000,"mips:10000",     FALSE, NN(I_mips10000)),
   N (64, 64, bfd_mach_mips12000,"mips:12000",     FALSE, NN(I_mips12000)),
+  N (64, 64, bfd_mach_mips14000,"mips:14000",     FALSE, NN(I_mips14000)),
+  N (64, 64, bfd_mach_mips16000,"mips:16000",     FALSE, NN(I_mips16000)),
   N (64, 64, bfd_mach_mips16,   "mips:16",        FALSE, NN(I_mips16)),
   N (64, 64, bfd_mach_mips5,    "mips:mips5",     FALSE, NN(I_mips5)),
   N (32, 32, bfd_mach_mipsisa32,  "mips:isa32",   FALSE, NN(I_mipsisa32)),
diff --git a/bfd/elfxx-mips.c b/bfd/elfxx-mips.c
index b49593b4286..24dcd4b4c82 100644
--- a/bfd/elfxx-mips.c
+++ b/bfd/elfxx-mips.c
@@ -10400,6 +10400,8 @@ mips_set_isa_flags (bfd *abfd)
     case bfd_mach_mips8000:
     case bfd_mach_mips10000:
     case bfd_mach_mips12000:
+    case bfd_mach_mips14000:
+    case bfd_mach_mips16000:
       val = E_MIPS_ARCH_4;
       break;
 
@@ -12124,6 +12126,8 @@ static const struct mips_mach_extension mips_mach_extensions[] = {
 
   /* R10000 extensions.  */
   { bfd_mach_mips12000, bfd_mach_mips10000 },
+  { bfd_mach_mips14000, bfd_mach_mips10000 },
+  { bfd_mach_mips16000, bfd_mach_mips10000 },
 
   /* R5000 extensions.  Note: the vr5500 ISA is an extension of the core
      vr5400 ISA, but doesn't include the multimedia stuff.  It seems
diff --git a/gas/ChangeLog b/gas/ChangeLog
index 81daee010bb..a3b93844707 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,9 @@
+2008-11-28  Joshua Kinard  <kumba@gentoo.org>
+
+	* config/tc-mips.c (hilo_interlocks): Handle CPU_R14000, CPU_R16000.
+	(mips_cpu_info_table): Add r14000, r16000.
+	* doc/c-mips.texi: Add entries for 14000, 16000.
+
 2008-11-27  M R Swami Reddy <MR.Swami.Reddy@nsc.com>
 
 	* config/tc-cr16.h (GLOBAL_OFFSET_TABLE_NAME): Defined
diff --git a/gas/config/tc-mips.c b/gas/config/tc-mips.c
index 17ee8d10864..c472509069f 100644
--- a/gas/config/tc-mips.c
+++ b/gas/config/tc-mips.c
@@ -472,6 +472,8 @@ static int mips_32bitmode = 0;
    || mips_opts.arch == CPU_R4010                     \
    || mips_opts.arch == CPU_R10000                    \
    || mips_opts.arch == CPU_R12000                    \
+   || mips_opts.arch == CPU_R14000                    \
+   || mips_opts.arch == CPU_R16000                    \
    || mips_opts.arch == CPU_RM7000                    \
    || mips_opts.arch == CPU_VR5500                    \
    )
@@ -15090,6 +15092,8 @@ static const struct mips_cpu_info mips_cpu_info_table[] =
   { "r8000",          0,			ISA_MIPS4,      CPU_R8000 },
   { "r10000",         0,			ISA_MIPS4,      CPU_R10000 },
   { "r12000",         0,			ISA_MIPS4,      CPU_R12000 },
+  { "r14000",         0,			ISA_MIPS4,      CPU_R14000 },
+  { "r16000",         0,			ISA_MIPS4,      CPU_R16000 },
   { "vr5000",         0,			ISA_MIPS4,      CPU_R5000 },
   { "vr5400",         0,			ISA_MIPS4,      CPU_VR5400 },
   { "vr5500",         0,			ISA_MIPS4,      CPU_VR5500 },
diff --git a/gas/doc/c-mips.texi b/gas/doc/c-mips.texi
index 136d2d22bff..2acdbf3d496 100644
--- a/gas/doc/c-mips.texi
+++ b/gas/doc/c-mips.texi
@@ -239,6 +239,8 @@ rm7000,
 rm9000,
 10000,
 12000,
+14000,
+16000,
 4kc,
 4km,
 4kp,
diff --git a/include/opcode/ChangeLog b/include/opcode/ChangeLog
index b64a8b6dd92..bda9ca193ba 100644
--- a/include/opcode/ChangeLog
+++ b/include/opcode/ChangeLog
@@ -1,3 +1,8 @@
+2008-11-28  Joshua Kinard  <kumba@gentoo.org>
+
+	* mips.h: Define CPU_R14000, CPU_R16000.
+        (OPCODE_IS_MEMBER): Include R14000, R16000 in test.
+
 2008-11-18  Catherine Moore  <clm@codesourcery.com>
 
 	* arm.h (FPU_NEON_FP16): New.
diff --git a/include/opcode/mips.h b/include/opcode/mips.h
index 9af9ea15b69..e7cfdb97908 100644
--- a/include/opcode/mips.h
+++ b/include/opcode/mips.h
@@ -632,6 +632,8 @@ static const unsigned int mips_isa_table[] =
 #define CPU_RM9000	9000
 #define CPU_R10000	10000
 #define CPU_R12000	12000
+#define CPU_R14000	14000
+#define CPU_R16000	16000
 #define CPU_MIPS16	16
 #define CPU_MIPS32	32
 #define CPU_MIPS32R2	33
@@ -661,7 +663,8 @@ static const unsigned int mips_isa_table[] =
      || (cpu == CPU_R4010 && ((insn)->membership & INSN_4010) != 0)	\
      || (cpu == CPU_VR4100 && ((insn)->membership & INSN_4100) != 0)	\
      || (cpu == CPU_R3900 && ((insn)->membership & INSN_3900) != 0)	\
-     || ((cpu == CPU_R10000 || cpu == CPU_R12000)			\
+     || ((cpu == CPU_R10000 || cpu == CPU_R12000 || cpu == CPU_R14000	\
+	  || cpu == CPU_R16000)						\
 	 && ((insn)->membership & INSN_10000) != 0)			\
      || (cpu == CPU_SB1 && ((insn)->membership & INSN_SB1) != 0)	\
      || (cpu == CPU_R4111 && ((insn)->membership & INSN_4111) != 0)	\
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index cb072c73d5e..dc62aa20927 100644
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,7 @@
+2008-11-28  Joshua Kinard  <kumba@gentoo.org>
+
+	* mips-dis.c (mips_arch_choices): Add r14000, r16000.
+
 2008-11-27  M R Swami Reddy <MR.Swami.Reddy@nsc.com>
 
 	* cr16-dis.c (match_opcode): Truncate mcode to 32 bit and
diff --git a/opcodes/mips-dis.c b/opcodes/mips-dis.c
index 7c385898248..759e2aa66d7 100644
--- a/opcodes/mips-dis.c
+++ b/opcodes/mips-dis.c
@@ -409,6 +409,10 @@ const struct mips_arch_choice mips_arch_choices[] =
     mips_cp0_names_numeric, NULL, 0, mips_hwr_names_numeric },
   { "r12000",	1, bfd_mach_mips12000, CPU_R12000, ISA_MIPS4,
     mips_cp0_names_numeric, NULL, 0, mips_hwr_names_numeric },
+  { "r14000",	1, bfd_mach_mips14000, CPU_R14000, ISA_MIPS4,
+    mips_cp0_names_numeric, NULL, 0, mips_hwr_names_numeric },
+  { "r16000",	1, bfd_mach_mips16000, CPU_R16000, ISA_MIPS4,
+    mips_cp0_names_numeric, NULL, 0, mips_hwr_names_numeric },
   { "mips5",	1, bfd_mach_mips5, CPU_MIPS5, ISA_MIPS5,
     mips_cp0_names_numeric, NULL, 0, mips_hwr_names_numeric },