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2004-11-25 Jan Beulich <jbeulich@novell.com>

	* config/tc-i386.c (optimize_imm): Adjust immediates to only those
	permissible for the selected instruction suffix.
	(process_suffix): For DefaultSize instructions, suppressing the
	guessing of a 'q' suffix if the instruction doesn't support it is
	pointless, because only an 'l' suffix can be guessed in this place.

gas/testsuite/
2004-11-25 Jan Beulich <jbeulich@novell.com>
	* gas/i386/x86-64-inval.[sl]: Remove sahf/lahf.

include/opcode/
2004-11-25 Jan Beulich <jbeulich@novell.com>

	* i386.h: CpuNo64 mov can't reasonably have a 'q' suffix. Moves
	to/from test registers are illegal in 64-bit mode. Add missing
	NoRex64 to sidt. fxsave/fxrstor now allow for a 'q' suffix
	(previously one had to explicitly encode a rex64 prefix). Re-enable
	lahf/sahf in 64-bit mode as at least some Athlon64/Opteron steppings
	support it there. Add cmpxchg16b as per Intel's 64-bit documentation.
This commit is contained in:
Jan Beulich
2004-11-25 08:42:54 +00:00
parent ebd98106b2
commit 37edbb65ad
7 changed files with 60 additions and 48 deletions
Download Patch File Download Diff File Expand all files Collapse all files

8
gas/ChangeLog
View File

@ -1,3 +1,11 @@
2004-11-25 Jan Beulich <jbeulich@novell.com>
* config/tc-i386.c (optimize_imm): Adjust immediates to only those
permissible for the selected instruction suffix.
(process_suffix): For DefaultSize instructions, suppressing the
guessing of a 'q' suffix if the instruction doesn't support it is
pointless, because only an 'l' suffix can be guessed in this place.
2004-11-24 Nick Clifton <nickc@redhat.com> 2004-11-24 Nick Clifton <nickc@redhat.com>
* config/tc-iq2000.c: Remove support for IQ10 processor. * config/tc-iq2000.c: Remove support for IQ10 processor.

5
gas/config/tc-i386.c
View File

@ -2362,9 +2362,6 @@ process_suffix (void)
&& (i.tm.opcode_modifier & No_sSuf)) && (i.tm.opcode_modifier & No_sSuf))
{ {
i.suffix = stackop_size; i.suffix = stackop_size;
if (i.suffix == QWORD_MNEM_SUFFIX
&& (i.tm.opcode_modifier & No_qSuf))
i.suffix = LONG_MNEM_SUFFIX;
} }
else if (intel_syntax else if (intel_syntax
&& !i.suffix && !i.suffix
@ -2702,7 +2699,7 @@ finalize_imm ()
i.types[0] = overlap0; i.types[0] = overlap0;
overlap1 = i.types[1] & i.tm.operand_types[1]; overlap1 = i.types[1] & i.tm.operand_types[1];
if ((overlap1 & (Imm8 | Imm8S | Imm16 | Imm32S | Imm32)) if ((overlap1 & (Imm8 | Imm8S | Imm16 | Imm32S | Imm32 | Imm64))
&& overlap1 != Imm8 && overlap1 != Imm8S && overlap1 != Imm8 && overlap1 != Imm8S
&& overlap1 != Imm16 && overlap1 != Imm32S && overlap1 != Imm16 && overlap1 != Imm32S
&& overlap1 != Imm32 && overlap1 != Imm64) && overlap1 != Imm32 && overlap1 != Imm64)

3
gas/testsuite/ChangeLog
View File

@ -1,3 +1,6 @@
2004-11-25 Jan Beulich <jbeulich@novell.com>
* gas/i386/x86-64-inval.[sl]: Remove sahf/lahf.
2004-11-24 Paul Brook <paul@codesourcery.com> 2004-11-24 Paul Brook <paul@codesourcery.com>
* gas/elf/group0a.d: Adjust expected secion ordering. * gas/elf/group0a.d: Adjust expected secion ordering.

62
gas/testsuite/gas/i386/x86-64-inval.l
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@ -48,8 +48,6 @@
.*:49: Error: .* .*:49: Error: .*
.*:50: Error: .* .*:50: Error: .*
.*:51: Error: .* .*:51: Error: .*
.*:52: Error: .*
.*:53: Error: .*
GAS LISTING .* GAS LISTING .*
@ -75,34 +73,32 @@ GAS LISTING .*
20 [ ]*foo:[ ]*jcxz foo # No prefix exists to select CX as a counter 20 [ ]*foo:[ ]*jcxz foo # No prefix exists to select CX as a counter
21 [ ]*jmpl \*%eax # 32-bit data size not allowed 21 [ ]*jmpl \*%eax # 32-bit data size not allowed
22 [ ]*jmpl \*\(%rax\) # 32-bit data size not allowed 22 [ ]*jmpl \*\(%rax\) # 32-bit data size not allowed
23 [ ]*lahf # illegal 23 [ ]*lcalll \$0,\$0 # illegal
24 [ ]*lcalll \$0,\$0 # illegal 24 [ ]*lcallq \$0,\$0 # illegal
25 [ ]*lcallq \$0,\$0 # illegal 25 [ ]*ldsl %eax,\(%rax\) # illegal
26 [ ]*ldsl %eax,\(%rax\) # illegal 26 [ ]*ldsq %rax,\(%rax\) # illegal
27 [ ]*ldsq %rax,\(%rax\) # illegal 27 [ ]*lesl %eax,\(%rax\) # illegal
28 [ ]*lesl %eax,\(%rax\) # illegal 28 [ ]*lesq %rax,\(%rax\) # illegal
29 [ ]*lesq %rax,\(%rax\) # illegal 29 [ ]*ljmpl \$0,\$0 # illegal
30 [ ]*ljmpl \$0,\$0 # illegal 30 [ ]*ljmpq \$0,\$0 # illegal
31 [ ]*ljmpq \$0,\$0 # illegal 31 [ ]*ljmpq \*\(%rax\) # 64-bit data size not allowed
32 [ ]*ljmpq \*\(%rax\) # 64-bit data size not allowed 32 [ ]*loopw foo # No prefix exists to select CX as a counter
33 [ ]*loopw foo # No prefix exists to select CX as a counter 33 [ ]*loopew foo # No prefix exists to select CX as a counter
34 [ ]*loopew foo # No prefix exists to select CX as a counter 34 [ ]*loopnew foo # No prefix exists to select CX as a counter
35 [ ]*loopnew foo # No prefix exists to select CX as a counter 35 [ ]*loopnzw foo # No prefix exists to select CX as a counter
36 [ ]*loopnzw foo # No prefix exists to select CX as a counter 36 [ ]*loopzw foo # No prefix exists to select CX as a counter
37 [ ]*loopzw foo # No prefix exists to select CX as a counter 37 [ ]*leavel # can't have 32-bit stack operands
38 [ ]*leavel # can't have 32-bit stack operands 38 [ ]*pop %ds # illegal
39 [ ]*pop %ds # illegal 39 [ ]*pop %es # illegal
40 [ ]*pop %es # illegal 40 [ ]*pop %ss # illegal
41 [ ]*pop %ss # illegal 41 [ ]*popa # illegal
42 [ ]*popa # illegal 42 [ ]*popl %eax # can't have 32-bit stack operands
43 [ ]*popl %eax # can't have 32-bit stack operands 43 [ ]*push %cs # illegal
44 [ ]*push %cs # illegal 44 [ ]*push %ds # illegal
45 [ ]*push %ds # illegal 45 [ ]*push %es # illegal
46 [ ]*push %es # illegal 46 [ ]*push %ss # illegal
47 [ ]*push %ss # illegal 47 [ ]*pusha # illegal
48 [ ]*pusha # illegal 48 [ ]*pushl %eax # can't have 32-bit stack operands
49 [ ]*pushl %eax # can't have 32-bit stack operands 49 [ ]*pushfl # can't have 32-bit stack operands
50 [ ]*pushfl # can't have 32-bit stack operands 50 [ ]*popfl # can't have 32-bit stack operands
51 [ ]*popfl # can't have 32-bit stack operands 51 [ ]*retl # can't have 32-bit stack operands
52 [ ]*retl # can't have 32-bit stack operands
53 [ ]*sahf # illegal

2
gas/testsuite/gas/i386/x86-64-inval.s
View File

@ -20,7 +20,6 @@
foo: jcxz foo # No prefix exists to select CX as a counter foo: jcxz foo # No prefix exists to select CX as a counter
jmpl *%eax # 32-bit data size not allowed jmpl *%eax # 32-bit data size not allowed
jmpl *(%rax) # 32-bit data size not allowed jmpl *(%rax) # 32-bit data size not allowed
lahf # illegal
lcalll $0,$0 # illegal lcalll $0,$0 # illegal
lcallq $0,$0 # illegal lcallq $0,$0 # illegal
ldsl %eax,(%rax) # illegal ldsl %eax,(%rax) # illegal
@ -50,4 +49,3 @@ foo: jcxz foo # No prefix exists to select CX as a counter
pushfl # can't have 32-bit stack operands pushfl # can't have 32-bit stack operands
popfl # can't have 32-bit stack operands popfl # can't have 32-bit stack operands
retl # can't have 32-bit stack operands retl # can't have 32-bit stack operands
sahf # illegal

13
include/opcode/ChangeLog
View File

@ -1,4 +1,13 @@
2004-11-23 Jan Beulich <jbeulich@novell.com> 2004-11-25 Jan Beulich <jbeulich@novell.com>
* i386.h: CpuNo64 mov can't reasonably have a 'q' suffix. Moves
to/from test registers are illegal in 64-bit mode. Add missing
NoRex64 to sidt. fxsave/fxrstor now allow for a 'q' suffix
(previously one had to explicitly encode a rex64 prefix). Re-enable
lahf/sahf in 64-bit mode as at least some Athlon64/Opteron steppings
support it there. Add cmpxchg16b as per Intel's 64-bit documentation.
2004-11-23 Jan Beulich <jbeulich@novell.com>
* i386.h (i386_optab): paddq and psubq, even in their MMX form, are * i386.h (i386_optab): paddq and psubq, even in their MMX form, are
available only with SSE2. Change the MMX additions introduced by SSE available only with SSE2. Change the MMX additions introduced by SSE
@ -35,7 +44,7 @@
(cris_imm_oprnd_size_type): New members SIZE_FIELD_SIGNED and (cris_imm_oprnd_size_type): New members SIZE_FIELD_SIGNED and
SIZE_FIELD_UNSIGNED. SIZE_FIELD_UNSIGNED.
2004-11-04 Jan Beulich <jbeulich@novell.com> 2004-11-04 Jan Beulich <jbeulich@novell.com>
* i386.h (sldx_Suf): Remove. * i386.h (sldx_Suf): Remove.
(FP, l_FP, sl_FP, x_FP): Don't imply IgnoreSize. (FP, l_FP, sl_FP, x_FP): Don't imply IgnoreSize.

15
include/opcode/i386.h
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@ -85,7 +85,7 @@ static const template i386_optab[] =
#define MOV_AX_DISP32 0xa0 #define MOV_AX_DISP32 0xa0
/* In the 64bit mode the short form mov immediate is redefined to have /* In the 64bit mode the short form mov immediate is redefined to have
64bit displacement value. */ 64bit displacement value. */
{ "mov", 2, 0xa0, X, CpuNo64,bwlq_Suf|D|W, { Disp16|Disp32, Acc, 0 } }, { "mov", 2, 0xa0, X, CpuNo64,bwl_Suf|D|W, { Disp16|Disp32, Acc, 0 } },
{ "mov", 2, 0x88, X, 0, bwlq_Suf|D|W|Modrm, { Reg, Reg|AnyMem, 0} }, { "mov", 2, 0x88, X, 0, bwlq_Suf|D|W|Modrm, { Reg, Reg|AnyMem, 0} },
/* In the 64bit mode the short form mov immediate is redefined to have /* In the 64bit mode the short form mov immediate is redefined to have
64bit displacement value. */ 64bit displacement value. */
@ -109,7 +109,7 @@ static const template i386_optab[] =
{ "mov", 2, 0x0f20, X, Cpu64, q_Suf|D|Modrm|IgnoreSize|NoRex64,{ Control, Reg64|InvMem, 0} }, { "mov", 2, 0x0f20, X, Cpu64, q_Suf|D|Modrm|IgnoreSize|NoRex64,{ Control, Reg64|InvMem, 0} },
{ "mov", 2, 0x0f21, X, Cpu386|CpuNo64, l_Suf|D|Modrm|IgnoreSize,{ Debug, Reg32|InvMem, 0} }, { "mov", 2, 0x0f21, X, Cpu386|CpuNo64, l_Suf|D|Modrm|IgnoreSize,{ Debug, Reg32|InvMem, 0} },
{ "mov", 2, 0x0f21, X, Cpu64, q_Suf|D|Modrm|IgnoreSize|NoRex64,{ Debug, Reg64|InvMem, 0} }, { "mov", 2, 0x0f21, X, Cpu64, q_Suf|D|Modrm|IgnoreSize|NoRex64,{ Debug, Reg64|InvMem, 0} },
{ "mov", 2, 0x0f24, X, Cpu386, l_Suf|D|Modrm|IgnoreSize, { Test, Reg32|InvMem, 0} }, { "mov", 2, 0x0f24, X, Cpu386|CpuNo64, l_Suf|D|Modrm|IgnoreSize, { Test, Reg32|InvMem, 0} },
{ "movabs",2, 0xa0, X, Cpu64, bwlq_Suf|D|W, { Disp64, Acc, 0 } }, { "movabs",2, 0xa0, X, Cpu64, bwlq_Suf|D|W, { Disp64, Acc, 0 } },
{ "movabs",2, 0xb0, X, Cpu64, q_Suf|W|ShortForm, { Imm64, Reg64, 0 } }, { "movabs",2, 0xb0, X, Cpu64, q_Suf|W|ShortForm, { Imm64, Reg64, 0 } },
@ -219,8 +219,8 @@ static const template i386_optab[] =
{"cli", 0, 0xfa, X, 0, NoSuf, { 0, 0, 0} }, {"cli", 0, 0xfa, X, 0, NoSuf, { 0, 0, 0} },
{"clts", 0, 0x0f06, X, Cpu286, NoSuf, { 0, 0, 0} }, {"clts", 0, 0x0f06, X, Cpu286, NoSuf, { 0, 0, 0} },
{"cmc", 0, 0xf5, X, 0, NoSuf, { 0, 0, 0} }, {"cmc", 0, 0xf5, X, 0, NoSuf, { 0, 0, 0} },
{"lahf", 0, 0x9f, X, CpuNo64,NoSuf, { 0, 0, 0} }, {"lahf", 0, 0x9f, X, 0, NoSuf, { 0, 0, 0} },
{"sahf", 0, 0x9e, X, CpuNo64,NoSuf, { 0, 0, 0} }, {"sahf", 0, 0x9e, X, 0, NoSuf, { 0, 0, 0} },
{"pushf", 0, 0x9c, X, CpuNo64,wl_Suf|DefaultSize, { 0, 0, 0} }, {"pushf", 0, 0x9c, X, CpuNo64,wl_Suf|DefaultSize, { 0, 0, 0} },
{"pushf", 0, 0x9c, X, Cpu64, wq_Suf|DefaultSize|NoRex64,{ 0, 0, 0} }, {"pushf", 0, 0x9c, X, Cpu64, wq_Suf|DefaultSize|NoRex64,{ 0, 0, 0} },
{"popf", 0, 0x9d, X, CpuNo64,wl_Suf|DefaultSize, { 0, 0, 0} }, {"popf", 0, 0x9d, X, CpuNo64,wl_Suf|DefaultSize, { 0, 0, 0} },
@ -578,7 +578,7 @@ static const template i386_optab[] =
{"sgdt", 1, 0x0f01, 0, Cpu286|CpuNo64, wl_Suf|Modrm, { WordMem, 0, 0} }, {"sgdt", 1, 0x0f01, 0, Cpu286|CpuNo64, wl_Suf|Modrm, { WordMem, 0, 0} },
{"sgdt", 1, 0x0f01, 0, Cpu64, q_Suf|Modrm|NoRex64, { LLongMem, 0, 0} }, {"sgdt", 1, 0x0f01, 0, Cpu64, q_Suf|Modrm|NoRex64, { LLongMem, 0, 0} },
{"sidt", 1, 0x0f01, 1, Cpu286|CpuNo64, wl_Suf|Modrm, { WordMem, 0, 0} }, {"sidt", 1, 0x0f01, 1, Cpu286|CpuNo64, wl_Suf|Modrm, { WordMem, 0, 0} },
{"sidt", 1, 0x0f01, 1, Cpu64, q_Suf|Modrm, { LLongMem, 0, 0} }, {"sidt", 1, 0x0f01, 1, Cpu64, q_Suf|Modrm|NoRex64, { LLongMem, 0, 0} },
{"sldt", 1, 0x0f00, 0, Cpu286, wlq_Suf|Modrm, { WordReg|InvMem, 0, 0} }, {"sldt", 1, 0x0f00, 0, Cpu286, wlq_Suf|Modrm, { WordReg|InvMem, 0, 0} },
{"sldt", 1, 0x0f00, 0, Cpu286, w_Suf|Modrm|IgnoreSize,{ ShortMem, 0, 0} }, {"sldt", 1, 0x0f00, 0, Cpu286, w_Suf|Modrm|IgnoreSize,{ ShortMem, 0, 0} },
{"smsw", 1, 0x0f01, 4, Cpu286, wlq_Suf|Modrm, { WordReg|InvMem, 0, 0} }, {"smsw", 1, 0x0f01, 4, Cpu286, wlq_Suf|Modrm, { WordReg|InvMem, 0, 0} },
@ -912,8 +912,8 @@ static const template i386_optab[] =
/* Pentium II/Pentium Pro extensions. */ /* Pentium II/Pentium Pro extensions. */
{"sysenter",0, 0x0f34, X, Cpu686, NoSuf, { 0, 0, 0} }, {"sysenter",0, 0x0f34, X, Cpu686, NoSuf, { 0, 0, 0} },
{"sysexit", 0, 0x0f35, X, Cpu686, NoSuf, { 0, 0, 0} }, {"sysexit", 0, 0x0f35, X, Cpu686, NoSuf, { 0, 0, 0} },
{"fxsave", 1, 0x0fae, 0, Cpu686, FP|Modrm, { LLongMem, 0, 0} }, {"fxsave", 1, 0x0fae, 0, Cpu686, q_Suf|Modrm, { LLongMem, 0, 0} },
{"fxrstor", 1, 0x0fae, 1, Cpu686, FP|Modrm, { LLongMem, 0, 0} }, {"fxrstor", 1, 0x0fae, 1, Cpu686, q_Suf|Modrm, { LLongMem, 0, 0} },
{"rdpmc", 0, 0x0f33, X, Cpu686, NoSuf, { 0, 0, 0} }, {"rdpmc", 0, 0x0f33, X, Cpu686, NoSuf, { 0, 0, 0} },
/* official undefined instr. */ /* official undefined instr. */
{"ud2", 0, 0x0f0b, X, Cpu686, NoSuf, { 0, 0, 0} }, {"ud2", 0, 0x0f0b, X, Cpu686, NoSuf, { 0, 0, 0} },
@ -1316,6 +1316,7 @@ static const template i386_optab[] =
{"addsubpd", 2, 0x660fd0, X, CpuPNI, NoSuf|IgnoreSize|Modrm, { RegXMM|LLongMem, RegXMM, 0 } }, {"addsubpd", 2, 0x660fd0, X, CpuPNI, NoSuf|IgnoreSize|Modrm, { RegXMM|LLongMem, RegXMM, 0 } },
{"addsubps", 2, 0xf20fd0, X, CpuPNI, NoSuf|IgnoreSize|Modrm, { RegXMM|LLongMem, RegXMM, 0 } }, {"addsubps", 2, 0xf20fd0, X, CpuPNI, NoSuf|IgnoreSize|Modrm, { RegXMM|LLongMem, RegXMM, 0 } },
{"cmpxchg16b",1, 0x0fc7, 1, CpuPNI|Cpu64, NoSuf|Modrm|Rex64, { LLongMem, 0, 0} },
{"fisttp", 1, 0xdf, 1, CpuPNI, sl_FP|Modrm, { ShortMem|LongMem, 0, 0} }, {"fisttp", 1, 0xdf, 1, CpuPNI, sl_FP|Modrm, { ShortMem|LongMem, 0, 0} },
{"fisttp", 1, 0xdd, 1, CpuPNI, q_FP|Modrm, { LLongMem, 0, 0} }, {"fisttp", 1, 0xdd, 1, CpuPNI, q_FP|Modrm, { LLongMem, 0, 0} },
{"fisttpll", 1, 0xdd, 1, CpuPNI, FP|Modrm, { LLongMem, 0, 0} }, {"fisttpll", 1, 0xdd, 1, CpuPNI, FP|Modrm, { LLongMem, 0, 0} },