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ppc/svp64: support LibreSOC architecture
This patch adds support for LibreSOC machine and SVP64 extension flag for PowerPC architecture. SV (Simple-V) is a strict RISC-paradigm Scalable Vector Extension for the Power ISA. SVP64 is the 64-bit Prefixed instruction format implementing SV. Funded by NLnet through EU Grants No: 825310 and 825322, SV is in DRAFT form and is to be publicly submitted via the OpenPOWER Foundation ISA Working Group via the newly-created External RFC Process. For more details, visit https://libre-soc.org.
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committed by
Alan Modra

parent
df4860daad
commit
33ae8a3ae3
@ -1382,6 +1382,8 @@ PowerPC options:\n"));
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fprintf (stream, _("\
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-mpower10, -mpwr10 generate code for Power10 architecture\n"));
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fprintf (stream, _("\
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-mlibresoc generate code for Libre-SOC architecture\n"));
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fprintf (stream, _("\
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-mcell generate code for Cell Broadband Engine architecture\n"));
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fprintf (stream, _("\
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-mcom generate code for Power/PowerPC common instructions\n"));
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@ -237,6 +237,9 @@ extern const unsigned int spe2_num_opcodes;
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/* Opcode is only supported by power10 architecture. */
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#define PPC_OPCODE_POWER10 0x400000000000ull
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/* Opcode is only supported by SVP64 extensions (LibreSOC architecture). */
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#define PPC_OPCODE_SVP64 0x800000000000ull
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/* A macro to extract the major opcode from an instruction. */
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#define PPC_OP(i) (((i) >> 26) & 0x3f)
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@ -200,6 +200,11 @@ struct ppc_mopt ppc_opts[] = {
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| PPC_OPCODE_POWER7 | PPC_OPCODE_POWER8 | PPC_OPCODE_POWER9
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| PPC_OPCODE_POWER10 | PPC_OPCODE_ALTIVEC | PPC_OPCODE_VSX),
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0 },
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{ "libresoc",(PPC_OPCODE_PPC | PPC_OPCODE_ISEL | PPC_OPCODE_64
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| PPC_OPCODE_POWER4 | PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6
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| PPC_OPCODE_POWER7 | PPC_OPCODE_POWER8 | PPC_OPCODE_POWER9
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| PPC_OPCODE_ALTIVEC | PPC_OPCODE_VSX | PPC_OPCODE_SVP64),
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0 },
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{ "future", (PPC_OPCODE_PPC | PPC_OPCODE_ISEL | PPC_OPCODE_64
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| PPC_OPCODE_POWER4 | PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6
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| PPC_OPCODE_POWER7 | PPC_OPCODE_POWER8 | PPC_OPCODE_POWER9
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@ -4832,6 +4832,7 @@ const unsigned int num_powerpc_operands = (sizeof (powerpc_operands)
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#define PPCHTM PPC_OPCODE_POWER8
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#define E200Z4 PPC_OPCODE_E200Z4
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#define PPCLSP PPC_OPCODE_LSP
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#define SVP64 PPC_OPCODE_SVP64
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/* Used to mark extended mnemonic in deprecated field so that -Mraw
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won't use this variant in disassembly. */
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#define EXT PPC_OPCODE_RAW
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