ppc/svp64: support LibreSOC architecture

This patch adds support for LibreSOC machine and SVP64 extension flag
for PowerPC architecture. SV (Simple-V) is a strict RISC-paradigm
Scalable Vector Extension for the Power ISA. SVP64 is the 64-bit
Prefixed instruction format implementing SV. Funded by NLnet through EU
Grants No: 825310 and 825322, SV is in DRAFT form and is to be publicly
submitted via the OpenPOWER Foundation ISA Working Group via the
newly-created External RFC Process.

For more details, visit https://libre-soc.org.
This commit is contained in:
Dmitry Selyutin
2022-07-25 16:10:14 +03:00
committed by Alan Modra
parent df4860daad
commit 33ae8a3ae3
4 changed files with 19 additions and 8 deletions

View File

@ -237,6 +237,9 @@ extern const unsigned int spe2_num_opcodes;
/* Opcode is only supported by power10 architecture. */
#define PPC_OPCODE_POWER10 0x400000000000ull
/* Opcode is only supported by SVP64 extensions (LibreSOC architecture). */
#define PPC_OPCODE_SVP64 0x800000000000ull
/* A macro to extract the major opcode from an instruction. */
#define PPC_OP(i) (((i) >> 26) & 0x3f)