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Add support for SIGILL (reserved-instruction-exception).

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This commit is contained in:
Andrew Cagney
2000-04-18 07:55:35 +00:00
parent 5ba474214c
commit 27842f65f2
5 changed files with 30 additions and 2 deletions
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9
sim/d10v/interp.c
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@ -99,8 +99,6 @@ lookup_hash (ins, size)
{
if (h->next == NULL)
{
(*d10v_callback->printf_filtered)
(d10v_callback, "ERROR: Illegal instruction %x at PC %x\n", ins, PC);
State.exception = SIGILL;
State.pc_changed = 1; /* Don't increment the PC. */
return NULL;
@ -979,6 +977,13 @@ sim_resume (sd, step, siggnal)
JMP (AE_VECTOR_START);
SLOT_FLUSH ();
break;
case SIGILL:
SET_BPC (PC);
SET_BPSW (PSW);
SET_HW_PSW ((PSW & (PSW_F0_BIT | PSW_F1_BIT | PSW_C_BIT)));
JMP (RIE_VECTOR_START);
SLOT_FLUSH ();
break;
default:
/* just ignore it */
break;