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Rationalize some of the i386 intel mode code.

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Indentation and white space changes.
This commit is contained in:
Alan Modra
1999-08-03 14:30:05 +00:00
parent 05fad94de0
commit 24eab124bd
2 changed files with 857 additions and 911 deletions
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17
gas/ChangeLog
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@ -4,8 +4,21 @@
1999-08-03 Alan Modra <alan@spri.levels.unisa.edu.au> 1999-08-03 Alan Modra <alan@spri.levels.unisa.edu.au>
* config/tc-i386.c (i386_operand): Add INFER_ADDR_PREFIX code, but * config/tc-i386.c: Indentation and white space changes.
don't enable it by default. White space changes. (i386_index_check): New function. Add INFER_ADDR_PREFIX code, but
don't enable it by default.
(i386_intel_operand): Remove redundant prototype.
Move check on number of memory operands, and i.mem_operands++
(i386_intel_memory_operand): To here.
Remove i386_immediate code from here. Remove special case code
for input and output using (%dx). Remove base/index checks and
call i386_index_check instead. Save initial operand_string
argument for error message.
(i386_operand): Remove redundant prototype. Move base/index
checks to i386_index_check.
(i386_displacement): Move intel mode check for non-zero
i.disp_operand
(i386_intel_memory_operand): To here.
1999-07-30 Jakub Jelinek <jj@ultra.linux.cz> 1999-07-30 Jakub Jelinek <jj@ultra.linux.cz>

211
gas/config/tc-i386.c
View File

@ -268,7 +268,7 @@ static int allow_naked_reg = 0; /* 1 if register prefix % not required */
const relax_typeS md_relax_table[] = const relax_typeS md_relax_table[] =
{ {
/* The fields are: /* The fields are:
1) most positive reach of this state, 1) most positive reach of this state,
2) most negative reach of this state, 2) most negative reach of this state,
3) how many bytes this mode will add to the size of the current frag 3) how many bytes this mode will add to the size of the current frag
@ -2060,7 +2060,7 @@ md_assemble (line)
} }
else if ((i.tm.opcode_modifier & Ugh) != 0) else if ((i.tm.opcode_modifier & Ugh) != 0)
{ {
/* UnixWare fsub no args is alias for fsubp, fadd -> faddp, etc */ /* UnixWare fsub no args is alias for fsubp, fadd -> faddp, etc. */
as_warn (_("translating to `%sp'"), i.tm.name); as_warn (_("translating to `%sp'"), i.tm.name);
} }
} }
@ -2716,10 +2716,6 @@ i386_displacement (disp_start, disp_end)
char *save_input_line_pointer; char *save_input_line_pointer;
int bigdisp = Disp32; int bigdisp = Disp32;
/* All of the pieces of the displacement expression are handled together. */
if (intel_syntax && i.disp_operands != 0)
return 1;
if (flag_16bit_code ^ (i.prefix[ADDR_PREFIX] != 0)) if (flag_16bit_code ^ (i.prefix[ADDR_PREFIX] != 0))
bigdisp = Disp16; bigdisp = Disp16;
i.types[this_operand] |= bigdisp; i.types[this_operand] |= bigdisp;
@ -3068,22 +3064,64 @@ i386_parse_seg (op_string)
} }
static int i386_index_check PARAMS((void));
static int
i386_index_check ()
{
/* Make sure the memory operand we've been dealt is valid. */
#if INFER_ADDR_PREFIX
tryprefix:
#endif
if (flag_16bit_code ^ (i.prefix[ADDR_PREFIX] != 0) ?
/* 16 bit mode checks */
((i.base_reg
&& ((i.base_reg->reg_type & (Reg16|BaseIndex))
!= (Reg16|BaseIndex)))
|| (i.index_reg
&& (((i.index_reg->reg_type & (Reg16|BaseIndex))
!= (Reg16|BaseIndex))
|| ! (i.base_reg
&& i.base_reg->reg_num < 6
&& i.index_reg->reg_num >= 6
&& i.log2_scale_factor == 0)))) :
/* 32 bit mode checks */
((i.base_reg
&& (i.base_reg->reg_type & Reg32) == 0)
|| (i.index_reg
&& ((i.index_reg->reg_type & (Reg32|BaseIndex))
!= (Reg32|BaseIndex)))))
{
#if INFER_ADDR_PREFIX
if (i.prefix[ADDR_PREFIX] == 0)
{
i.prefix[ADDR_PREFIX] = ADDR_PREFIX_OPCODE;
i.prefixes += 1;
goto tryprefix;
}
else
#endif
return 0;
}
return 1;
}
static int i386_intel_memory_operand PARAMS ((char *)); static int i386_intel_memory_operand PARAMS ((char *));
static int static int
i386_intel_memory_operand (op_string) i386_intel_memory_operand (operand_string)
char *op_string; char *operand_string;
{ {
char *op_string = operand_string;
char *end_of_operand_string; char *end_of_operand_string;
if (is_digit_char (*op_string) if ((i.mem_operands == 1
&& strchr (op_string, '[') == 0) && (current_templates->start->opcode_modifier & IsString) == 0)
|| i.mem_operands == 2)
{ {
if (!i386_immediate (op_string)) as_bad (_("too many memory references for `%s'"),
current_templates->start->name);
return 0; return 0;
else
return 1;
} }
/* Look for displacement preceding open bracket */ /* Look for displacement preceding open bracket */
@ -3101,7 +3139,9 @@ i386_intel_memory_operand (op_string)
} }
temp_string = build_displacement_string (true, op_string); temp_string = build_displacement_string (true, op_string);
if (!i386_displacement (temp_string, temp_string + strlen (temp_string)))
if (i.disp_operands == 0 &&
!i386_displacement (temp_string, temp_string + strlen (temp_string)))
return 0; return 0;
end_of_operand_string = strchr (op_string, '['); end_of_operand_string = strchr (op_string, '[');
@ -3170,7 +3210,8 @@ i386_intel_memory_operand (op_string)
if (*temp_string == '+') if (*temp_string == '+')
++temp_string; ++temp_string;
if (!i386_displacement (temp_string, temp_string + strlen (temp_string))) if (i.disp_operands == 0 &&
!i386_displacement (temp_string, temp_string + strlen (temp_string)))
return 0; return 0;
++op_string; ++op_string;
@ -3199,11 +3240,17 @@ i386_intel_memory_operand (op_string)
} }
} }
if (i386_index_check () == 0)
{
as_bad (_("`%s' is not a valid base/index expression"),
operand_string);
return 0;
}
i.mem_operands++;
return 1; return 1;
} }
static int i386_intel_operand PARAMS ((char *, int));
static int static int
i386_intel_operand (operand_string, got_a_float) i386_intel_operand (operand_string, got_a_float)
char *operand_string; char *operand_string;
@ -3222,30 +3269,17 @@ i386_intel_operand (operand_string, got_a_float)
case DWORD_PTR: case DWORD_PTR:
case QWORD_PTR: case QWORD_PTR:
case XWORD_PTR: case XWORD_PTR:
if ((i.mem_operands == 1
&& (current_templates->start->opcode_modifier & IsString) == 0)
|| i.mem_operands == 2)
{
as_bad (_("too many memory references for `%s'"),
current_templates->start->name);
return 0;
}
if (!i386_intel_memory_operand (op_string)) if (!i386_intel_memory_operand (op_string))
return 0; return 0;
i.mem_operands++;
break; break;
case FLAT: case FLAT:
case OFFSET_FLAT: case OFFSET_FLAT:
if (!i386_immediate (op_string)) if (!i386_immediate (op_string))
return 0; return 0;
break; break;
case SHORT: case SHORT:
case NONE_FOUND: case NONE_FOUND:
/* Should be register or immediate */ /* Should be register or immediate */
if (is_digit_char (*op_string) if (is_digit_char (*op_string)
@ -3258,7 +3292,6 @@ i386_intel_operand (operand_string, got_a_float)
|| (allow_naked_reg || (allow_naked_reg
&& i386_is_reg (op_string))) && i386_is_reg (op_string)))
{ {
register const reg_entry * r; register const reg_entry * r;
char *end_op; char *end_op;
@ -3300,69 +3333,20 @@ i386_intel_operand (operand_string, got_a_float)
i.regs[this_operand] = r; i.regs[this_operand] = r;
i.reg_operands++; i.reg_operands++;
} }
else else
{ {
if (!i386_intel_memory_operand (op_string)) if (!i386_intel_memory_operand (op_string))
return 0; return 0;
i.mem_operands++;
} }
break; break;
} /* end switch */ } /* end switch */
/* Special case for (%dx) while doing input/output op. */
if (i.base_reg
&& i.base_reg->reg_type == (Reg16 | InOutPortReg)
&& i.index_reg == 0
&& i.log2_scale_factor == 0
&& i.seg[i.mem_operands] == 0
&& (i.types[this_operand] & Disp) == 0)
{
i.types[this_operand] = InOutPortReg;
return 1;
}
/* Make sure the memory operand we've been dealt is valid. */
if (flag_16bit_code ^ (i.prefix[ADDR_PREFIX] != 0))
{
if ((i.base_reg
&& ((i.base_reg->reg_type & (Reg16|BaseIndex))
!= (Reg16|BaseIndex)))
|| (i.index_reg
&& (((i.index_reg->reg_type & (Reg16|BaseIndex))
!= (Reg16|BaseIndex))
|| ! (i.base_reg
&& i.base_reg->reg_num < 6
&& i.index_reg->reg_num >= 6
&& i.log2_scale_factor == 0))))
{
as_bad (_("`%s' is not a valid %s bit base/index expression"),
operand_string, "16");
return 0;
}
}
else
{
if ((i.base_reg
&& (i.base_reg->reg_type & Reg32) == 0)
|| (i.index_reg
&& ((i.index_reg->reg_type & (Reg32|BaseIndex))
!= (Reg32|BaseIndex))))
{
as_bad (_("`%s' is not a valid %s bit base/index expression"),
operand_string, "32");
return 0;
}
}
return 1; return 1;
} }
/* Parse OPERAND_STRING into the i386_insn structure I. Returns non-zero /* Parse OPERAND_STRING into the i386_insn structure I. Returns non-zero
on error. */ on error. */
static int i386_operand PARAMS ((char *));
static int static int
i386_operand (operand_string) i386_operand (operand_string)
char *operand_string; char *operand_string;
@ -3653,64 +3637,13 @@ i386_operand (operand_string)
i.types[this_operand] = InOutPortReg; i.types[this_operand] = InOutPortReg;
return 1; return 1;
} }
/* Make sure the memory operand we've been dealt is valid. */
if (flag_16bit_code ^ (i.prefix[ADDR_PREFIX] != 0)) if (i386_index_check () == 0)
{ {
#if INFER_ADDR_PREFIX as_bad (_("`%s' is not a valid base/index expression"),
try16: operand_string);
#endif
if ((i.base_reg
&& ((i.base_reg->reg_type & (Reg16|BaseIndex))
!= (Reg16|BaseIndex)))
|| (i.index_reg
&& (((i.index_reg->reg_type & (Reg16|BaseIndex))
!= (Reg16|BaseIndex))
|| ! (i.base_reg
&& i.base_reg->reg_num < 6
&& i.index_reg->reg_num >= 6
&& i.log2_scale_factor == 0))))
{
#if INFER_ADDR_PREFIX
if (i.prefix[ADDR_PREFIX] == 0)
{
i.prefix[ADDR_PREFIX] = ADDR_PREFIX_OPCODE;
goto try32;
}
else
#endif
{
as_bad (_("`%s' is not a valid %s bit base/index expression"),
operand_string, "16");
return 0; return 0;
} }
}
}
else
{
#if INFER_ADDR_PREFIX
try32:
#endif
if ((i.base_reg
&& (i.base_reg->reg_type & Reg32) == 0)
|| (i.index_reg
&& ((i.index_reg->reg_type & (Reg32|BaseIndex))
!= (Reg32|BaseIndex))))
{
#if INFER_ADDR_PREFIX
if (i.prefix[ADDR_PREFIX] == 0)
{
i.prefix[ADDR_PREFIX] = ADDR_PREFIX_OPCODE;
goto try16;
}
else
#endif
{
as_bad (_("`%s' is not a valid %s bit base/index expression"),
operand_string, "32");
return 0;
}
}
}
i.mem_operands++; i.mem_operands++;
} }
else else
@ -3775,8 +3708,8 @@ md_estimate_size_before_relax (fragP, segment)
break; break;
default: default:
/* This changes the byte-displacement jump 0x7N --> /* This changes the byte-displacement jump 0x7N
the dword-displacement jump 0x0f8N */ to the dword-displacement jump 0x0f8N. */
opcode[1] = opcode[0] + 0x10; opcode[1] = opcode[0] + 0x10;
opcode[0] = TWO_BYTE_OPCODE_ESCAPE; /* two-byte escape */ opcode[0] = TWO_BYTE_OPCODE_ESCAPE; /* two-byte escape */
fragP->fr_fix += 1 + size; /* we've added an opcode byte */ fragP->fr_fix += 1 + size; /* we've added an opcode byte */