espressif/binutils-gdb
1
0
Fork 0
mirror of https://github.com/espressif/binutils-gdb.git synced 2025-06-21 02:24:17 +08:00
Code Issues Packages Projects Releases Wiki Activity

* config/tc-xc16x.c (md_cgen_lookup_reloc): Ensure fix_size is set

Browse Source 
correctly for all 16 bit relocs.  Return BFD_RELOC_NONE if reloc
	isn't recognized, not BFD_RELOC_XC16X_SOF.

	testsuite:
	* gas/xc16x/shlrol.s: Specify constant shift amount.
	* gas/xc16x/xc16x.exp (do_xc16x_shlrol): Update expected output.
This commit is contained in:
Doug Evans
2009-10-19 15:27:39 +00:00
parent 764ed107e9
commit 23f5dfcb86
5 changed files with 30 additions and 12 deletions
Download Patch File Download Diff File Expand all files Collapse all files

6
gas/ChangeLog
View File

@ -1,3 +1,9 @@
2009-10-19 Doug Evans <dje@sebabeach.org>
* config/tc-xc16x.c (md_cgen_lookup_reloc): Ensure fix_size is set
correctly for all 16 bit relocs. Return BFD_RELOC_NONE if reloc
isn't recognized, not BFD_RELOC_XC16X_SOF.
2009-10-18 Alan Modra <amodra@bigpond.net.au> 2009-10-18 Alan Modra <amodra@bigpond.net.au>
* as.h (know): Don't define as empty. * as.h (know): Don't define as empty.

11
gas/config/tc-xc16x.c
View File

@ -154,38 +154,46 @@ md_cgen_lookup_reloc (const CGEN_INSN *insn ATTRIBUTE_UNUSED,
switch (operand->type) switch (operand->type)
{ {
case XC16X_OPERAND_REL: case XC16X_OPERAND_REL:
/* ??? Adjust size? */
fixP->fx_where += 1; fixP->fx_where += 1;
fixP->fx_pcrel = 1; fixP->fx_pcrel = 1;
return BFD_RELOC_8_PCREL; return BFD_RELOC_8_PCREL;
case XC16X_OPERAND_CADDR: case XC16X_OPERAND_CADDR:
fixP->fx_size = 2;
fixP->fx_where += 2; fixP->fx_where += 2;
return BFD_RELOC_16; return BFD_RELOC_16;
case XC16X_OPERAND_UIMM7: case XC16X_OPERAND_UIMM7:
/* ??? Adjust size? */
fixP->fx_where += 1; fixP->fx_where += 1;
fixP->fx_pcrel = 1; fixP->fx_pcrel = 1;
return BFD_RELOC_8_PCREL; return BFD_RELOC_8_PCREL;
case XC16X_OPERAND_UIMM16: case XC16X_OPERAND_UIMM16:
case XC16X_OPERAND_MEMORY: case XC16X_OPERAND_MEMORY:
fixP->fx_size = 2;
fixP->fx_where += 2; fixP->fx_where += 2;
return BFD_RELOC_16; return BFD_RELOC_16;
case XC16X_OPERAND_UPOF16: case XC16X_OPERAND_UPOF16:
fixP->fx_size = 2;
fixP->fx_where += 2; fixP->fx_where += 2;
return BFD_RELOC_XC16X_POF; return BFD_RELOC_XC16X_POF;
case XC16X_OPERAND_UPAG16: case XC16X_OPERAND_UPAG16:
fixP->fx_size = 2;
fixP->fx_where += 2; fixP->fx_where += 2;
return BFD_RELOC_XC16X_PAG; return BFD_RELOC_XC16X_PAG;
case XC16X_OPERAND_USEG8: case XC16X_OPERAND_USEG8:
/* ??? This is an 8 bit field, why the 16 bit reloc? */
fixP->fx_where += 1; fixP->fx_where += 1;
return BFD_RELOC_XC16X_SEG; return BFD_RELOC_XC16X_SEG;
case XC16X_OPERAND_USEG16: case XC16X_OPERAND_USEG16:
case XC16X_OPERAND_USOF16: case XC16X_OPERAND_USOF16:
fixP->fx_size = 2;
fixP->fx_where += 2; fixP->fx_where += 2;
return BFD_RELOC_XC16X_SOF; return BFD_RELOC_XC16X_SOF;
@ -193,8 +201,7 @@ md_cgen_lookup_reloc (const CGEN_INSN *insn ATTRIBUTE_UNUSED,
break; break;
} }
fixP->fx_where += 2; return BFD_RELOC_NONE;
return BFD_RELOC_XC16X_SOF;
} }
/* Write a value out to the object file, using the appropriate endianness. */ /* Write a value out to the object file, using the appropriate endianness. */

5
gas/testsuite/ChangeLog
View File

@ -1,3 +1,8 @@
2009-10-19 Doug Evans <dje@sebabeach.org>
* gas/xc16x/shlrol.s: Specify constant shift amount.
* gas/xc16x/xc16x.exp (do_xc16x_shlrol): Update expected output.
2009-10-18 Vincent Rivière <vincent.riviere@freesbee.fr> 2009-10-18 Vincent Rivière <vincent.riviere@freesbee.fr>
* gas/all/weakref1u.d: Exclude more aout targets. * gas/all/weakref1u.d: Exclude more aout targets.

10
gas/testsuite/gas/xc16x/shlrol.s
View File

@ -3,12 +3,12 @@
xc16x_shlrol: xc16x_shlrol:
shl r0,r1 shl r0,r1
shl r0,#a shl r0,#4
shr r0,r1 shr r0,r1
shr r0,#a shr r0,#4
rol r0,r1 rol r0,r1
rol r0,#a rol r0,#4
ror r0,r1 ror r0,r1
ror r0,#a ror r0,#4
ashr r0,r1 ashr r0,r1
ashr r0,#a ashr r0,#4

10
gas/testsuite/gas/xc16x/xc16x.exp
View File

@ -557,15 +557,15 @@ proc do_xc16x_shlrol {} {
while 1 { while 1 {
expect { expect {
-re " +\[0-9\]+ 0000 4C01\[^\n\]*\n" { set x [expr $x+1] } -re " +\[0-9\]+ 0000 4C01\[^\n\]*\n" { set x [expr $x+1] }
-re " +\[0-9\]+ 0002 5C00\[^\n\]*\n" { set x [expr $x+1] } -re " +\[0-9\]+ 0002 5C40\[^\n\]*\n" { set x [expr $x+1] }
-re " +\[0-9\]+ 0004 6C01\[^\n\]*\n" { set x [expr $x+1] } -re " +\[0-9\]+ 0004 6C01\[^\n\]*\n" { set x [expr $x+1] }
-re " +\[0-9\]+ 0006 7C00\[^\n\]*\n" { set x [expr $x+1] } -re " +\[0-9\]+ 0006 7C40\[^\n\]*\n" { set x [expr $x+1] }
-re " +\[0-9\]+ 0008 0C01\[^\n\]*\n" { set x [expr $x+1] } -re " +\[0-9\]+ 0008 0C01\[^\n\]*\n" { set x [expr $x+1] }
-re " +\[0-9\]+ 000a 1C00\[^\n\]*\n" { set x [expr $x+1] } -re " +\[0-9\]+ 000a 1C40\[^\n\]*\n" { set x [expr $x+1] }
-re " +\[0-9\]+ 000c 2C01\[^\n\]*\n" { set x [expr $x+1] } -re " +\[0-9\]+ 000c 2C01\[^\n\]*\n" { set x [expr $x+1] }
-re " +\[0-9\]+ 000e 3C00\[^\n\]*\n" { set x [expr $x+1] } -re " +\[0-9\]+ 000e 3C40\[^\n\]*\n" { set x [expr $x+1] }
-re " +\[0-9\]+ 0010 AC01\[^\n\]*\n" { set x [expr $x+1] } -re " +\[0-9\]+ 0010 AC01\[^\n\]*\n" { set x [expr $x+1] }
-re " +\[0-9\]+ 0012 BC00\[^\n\]*\n" { set x [expr $x+1] } -re " +\[0-9\]+ 0012 BC40\[^\n\]*\n" { set x [expr $x+1] }
timeout { perror "timeout\n; break } timeout { perror "timeout\n; break }
eof { break } eof { break }
} }